imx-common/cmd_bmode.c: add imx bmode (bootmode) command
authorTroy Kisky <troy.kisky@boundarydevices.com>
Wed, 15 Aug 2012 10:31:20 +0000 (10:31 +0000)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sat, 1 Sep 2012 12:58:26 +0000 (14:58 +0200)
This is useful for forcing the ROM's
usb downloader to activate upon a watchdog reset.
Or, you can boot from either SD Card.

Currently, support added for MX53 and MX6Q
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Note: MX53 support untested.
Acked-by: Stefano Babic <sbabic@denx.de>
arch/arm/cpu/armv7/imx-common/Makefile
arch/arm/cpu/armv7/imx-common/cmd_bmode.c [new file with mode: 0644]
arch/arm/cpu/armv7/mx5/soc.c
arch/arm/cpu/armv7/mx6/soc.c
arch/arm/include/asm/arch-mx5/imx-regs.h
arch/arm/include/asm/arch-mx6/imx-regs.h
arch/arm/include/asm/imx-common/boot_mode.h [new file with mode: 0644]

index bf36be57673e9d20c586676def426defb0b20ce7..16fba8da938aa247eba57734767c7f6805299fbb 100644 (file)
@@ -29,6 +29,7 @@ LIB     = $(obj)libimx-common.o
 
 COBJS-y        = iomux-v3.o timer.o cpu.o speed.o
 COBJS-$(CONFIG_I2C_MXC) += i2c.o
+COBJS-$(CONFIG_CMD_BMODE) += cmd_bmode.o
 COBJS  := $(sort $(COBJS-y))
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/arch/arm/cpu/armv7/imx-common/cmd_bmode.c b/arch/arm/cpu/armv7/imx-common/cmd_bmode.c
new file mode 100644 (file)
index 0000000..02fe72e
--- /dev/null
@@ -0,0 +1,119 @@
+/*
+ * Copyright (C) 2012 Boundary Devices Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <asm/errno.h>
+#include <asm/io.h>
+#include <asm/imx-common/boot_mode.h>
+#include <malloc.h>
+
+static const struct boot_mode *modes[2];
+
+static const struct boot_mode *search_modes(char *arg)
+{
+       int i;
+
+       for (i = 0; i < ARRAY_SIZE(modes); i++) {
+               const struct boot_mode *p = modes[i];
+               if (p) {
+                       while (p->name) {
+                               if (!strcmp(p->name, arg))
+                                       return p;
+                               p++;
+                       }
+               }
+       }
+       return NULL;
+}
+
+static int create_usage(char *dest)
+{
+       int i;
+       int size = 0;
+
+       for (i = 0; i < ARRAY_SIZE(modes); i++) {
+               const struct boot_mode *p = modes[i];
+               if (p) {
+                       while (p->name) {
+                               int len = strlen(p->name);
+                               if (dest) {
+                                       memcpy(dest, p->name, len);
+                                       dest += len;
+                                       *dest++ = '|';
+                               }
+                               size += len + 1;
+                               p++;
+                       }
+               }
+       }
+       if (dest)
+               memcpy(dest - 1, " [noreset]", 11);     /* include trailing 0 */
+       size += 10;
+       return size;
+}
+
+static int do_boot_mode(cmd_tbl_t *cmdtp, int flag, int argc,
+               char * const argv[])
+{
+       const struct boot_mode *p;
+       int reset_requested = 1;
+
+       if (argc < 2)
+               return CMD_RET_USAGE;
+       p = search_modes(argv[1]);
+       if (!p)
+               return CMD_RET_USAGE;
+       if (argc == 3) {
+               if (strcmp(argv[2], "noreset"))
+                       return CMD_RET_USAGE;
+               reset_requested = 0;
+       }
+
+       boot_mode_apply(p->cfg_val);
+       if (reset_requested && p->cfg_val)
+               do_reset(NULL, 0, 0, NULL);
+       return 0;
+}
+
+U_BOOT_CMD(
+       bmode, 3, 0, do_boot_mode,
+       NULL,
+       "");
+
+void add_board_boot_modes(const struct boot_mode *p)
+{
+       int size;
+       char *dest;
+
+       if (__u_boot_cmd_bmode.usage) {
+               free(__u_boot_cmd_bmode.usage);
+               __u_boot_cmd_bmode.usage = NULL;
+       }
+
+       modes[0] = p;
+       modes[1] = soc_boot_modes;
+       size = create_usage(NULL);
+       dest = malloc(size);
+       if (dest) {
+               create_usage(dest);
+               __u_boot_cmd_bmode.usage = dest;
+       }
+}
index 98203ba514c19f2230171559983b3c17b5b16a0d..263658aa4be46857f2b00abc0a97a18fbce5a2c2 100644 (file)
@@ -30,6 +30,7 @@
 
 #include <asm/errno.h>
 #include <asm/io.h>
+#include <asm/imx-common/boot_mode.h>
 
 #if !(defined(CONFIG_MX51) || defined(CONFIG_MX53))
 #error "CPU_TYPE not defined"
@@ -123,3 +124,33 @@ void set_chipselect_size(int const cs_size)
 
        writel(reg, &iomuxc_regs->gpr1);
 }
+
+#ifdef CONFIG_MX53
+void boot_mode_apply(unsigned cfg_val)
+{
+       writel(cfg_val, &((struct srtc_regs *)SRTC_BASE_ADDR)->lpgr);
+}
+/*
+ * cfg_val will be used for
+ * Boot_cfg3[7:0]:Boot_cfg2[7:0]:Boot_cfg1[7:0]
+ *
+ * If bit 28 of LPGR is set upon watchdog reset,
+ * bits[25:0] of LPGR will move to SBMR.
+ */
+const struct boot_mode soc_boot_modes[] = {
+       {"normal",      MAKE_CFGVAL(0x00, 0x00, 0x00, 0x00)},
+       /* usb or serial download */
+       {"usb",         MAKE_CFGVAL(0x00, 0x00, 0x00, 0x13)},
+       {"sata",        MAKE_CFGVAL(0x28, 0x00, 0x00, 0x12)},
+       {"escpi1:0",    MAKE_CFGVAL(0x38, 0x20, 0x00, 0x12)},
+       {"escpi1:1",    MAKE_CFGVAL(0x38, 0x20, 0x04, 0x12)},
+       {"escpi1:2",    MAKE_CFGVAL(0x38, 0x20, 0x08, 0x12)},
+       {"escpi1:3",    MAKE_CFGVAL(0x38, 0x20, 0x0c, 0x12)},
+       /* 4 bit bus width */
+       {"esdhc1",      MAKE_CFGVAL(0x40, 0x20, 0x00, 0x12)},
+       {"esdhc2",      MAKE_CFGVAL(0x40, 0x20, 0x08, 0x12)},
+       {"esdhc3",      MAKE_CFGVAL(0x40, 0x20, 0x10, 0x12)},
+       {"esdhc4",      MAKE_CFGVAL(0x40, 0x20, 0x18, 0x12)},
+       {NULL,          0},
+};
+#endif
index 84b458c7eb0d68863c03779dfcb3bf186f149a5c..7380ffe46c544c225d7d62afc0789512147e541f 100644 (file)
@@ -29,6 +29,7 @@
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/sys_proto.h>
+#include <asm/imx-common/boot_mode.h>
 
 u32 get_cpu_rev(void)
 {
@@ -141,3 +142,38 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
 
 }
 #endif
+
+void boot_mode_apply(unsigned cfg_val)
+{
+       unsigned reg;
+       struct src_regs *psrc = (struct src_regs *)SRC_BASE_ADDR;
+       writel(cfg_val, &psrc->gpr9);
+       reg = readl(&psrc->gpr10);
+       if (cfg_val)
+               reg |= 1 << 28;
+       else
+               reg &= ~(1 << 28);
+       writel(reg, &psrc->gpr10);
+}
+/*
+ * cfg_val will be used for
+ * Boot_cfg4[7:0]:Boot_cfg3[7:0]:Boot_cfg2[7:0]:Boot_cfg1[7:0]
+ * After reset, if GPR10[28] is 1, ROM will copy GPR9[25:0]
+ * to SBMR1, which will determine the boot device.
+ */
+const struct boot_mode soc_boot_modes[] = {
+       {"normal",      MAKE_CFGVAL(0x00, 0x00, 0x00, 0x00)},
+       /* reserved value should start rom usb */
+       {"usb",         MAKE_CFGVAL(0x01, 0x00, 0x00, 0x00)},
+       {"sata",        MAKE_CFGVAL(0x20, 0x00, 0x00, 0x00)},
+       {"escpi1:0",    MAKE_CFGVAL(0x30, 0x00, 0x00, 0x08)},
+       {"escpi1:1",    MAKE_CFGVAL(0x30, 0x00, 0x00, 0x18)},
+       {"escpi1:2",    MAKE_CFGVAL(0x30, 0x00, 0x00, 0x28)},
+       {"escpi1:3",    MAKE_CFGVAL(0x30, 0x00, 0x00, 0x38)},
+       /* 4 bit bus width */
+       {"esdhc1",      MAKE_CFGVAL(0x40, 0x20, 0x00, 0x00)},
+       {"esdhc2",      MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)},
+       {"esdhc3",      MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)},
+       {"esdhc4",      MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)},
+       {NULL,          0},
+};
index 7f66b61b3c88df0d0d7d06460e11ff2db81d109b..c53465f69f5aa2a07301010a5e4d3e406c864a0e 100644 (file)
@@ -459,6 +459,24 @@ struct src {
        u32     simr;
 };
 
+struct srtc_regs {
+       u32     lpscmr;         /* 0x00 */
+       u32     lpsclr;         /* 0x04 */
+       u32     lpsar;          /* 0x08 */
+       u32     lpsmcr;         /* 0x0c */
+       u32     lpcr;           /* 0x10 */
+       u32     lpsr;           /* 0x14 */
+       u32     lppdr;          /* 0x18 */
+       u32     lpgr;           /* 0x1c */
+       u32     hpcmr;          /* 0x20 */
+       u32     hpclr;          /* 0x24 */
+       u32     hpamr;          /* 0x28 */
+       u32     hpalr;          /* 0x2c */
+       u32     hpcr;           /* 0x30 */
+       u32     hpisr;          /* 0x34 */
+       u32     hpienr;         /* 0x38 */
+};
+
 /* CSPI registers */
 struct cspi_regs {
        u32 rxdata;
index 5d77603ebfe5aa15294e4d5c4bc8411cf20d6746..dacb9ea8cf6b8d4d5e011a0ae34278b1fa31bd2e 100644 (file)
@@ -448,5 +448,26 @@ struct iomuxc_base_regs {
        u32     daisy[104];     /* 0x7b0..94c */
 };
 
+struct src_regs {
+       u32     scr;            /* 0x00 */
+       u32     sbmr1;          /* 0x04 */
+       u32     srsr;           /* 0x08 */
+       u32     reserved1;      /* 0x0c */
+       u32     reserved2;      /* 0x10 */
+       u32     sisr;           /* 0x14 */
+       u32     simr;           /* 0x18 */
+       u32     sbmr2;          /* 0x1c */
+       u32     gpr1;           /* 0x20 */
+       u32     gpr2;           /* 0x24 */
+       u32     gpr3;           /* 0x28 */
+       u32     gpr4;           /* 0x2c */
+       u32     gpr5;           /* 0x30 */
+       u32     gpr6;           /* 0x34 */
+       u32     gpr7;           /* 0x38 */
+       u32     gpr8;           /* 0x3c */
+       u32     gpr9;           /* 0x40 */
+       u32     gpr10;          /* 0x44 */
+};
+
 #endif /* __ASSEMBLER__*/
 #endif /* __ASM_ARCH_MX6_IMX_REGS_H__ */
diff --git a/arch/arm/include/asm/imx-common/boot_mode.h b/arch/arm/include/asm/imx-common/boot_mode.h
new file mode 100644 (file)
index 0000000..6d2df74
--- /dev/null
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2012 Boundary Devices Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _ASM_BOOT_MODE_H
+#define _ASM_BOOT_MODE_H
+#define MAKE_CFGVAL(cfg1, cfg2, cfg3, cfg4) \
+       ((cfg4) << 24) | ((cfg3) << 16) | ((cfg2) << 8) | (cfg1)
+
+struct boot_mode {
+       const char *name;
+       unsigned cfg_val;
+};
+
+void add_board_boot_modes(const struct boot_mode *p);
+void boot_mode_apply(unsigned cfg_val);
+extern const struct boot_mode soc_boot_modes[];
+#endif