Define this variable to enable hw flow control in serial driver.
Current user of this option is drivers/serial/nsl16550.c driver
-- Console Baudrate:
- CONFIG_BAUDRATE - in bps
- Select one of the baudrates listed in
- CONFIG_SYS_BAUDRATE_TABLE, see below.
-
- Autoboot Command:
CONFIG_BOOTCOMMAND
Only needed when CONFIG_BOOTDELAY is enabled;
#define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */
#define PHYS_SDRAM_2_SIZE SZ_2G /* 2 GB */
-/* Serial */
-#define CONFIG_BAUDRATE 115200
-
/* Monitor Command Prompt */
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_CBSIZE SZ_2K
#define CONFIG_SYS_NS16550_COM2 0x66110000
#define CONFIG_SYS_NS16550_COM3 0x66120000
#define CONFIG_SYS_NS16550_COM4 0x66130000
-#define CONFIG_BAUDRATE 115200
/* console configuration */
#define CONFIG_SYS_CBSIZE SZ_1K
/*
* Serial console configuration.
*/
-#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
115200}
#define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */
#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */
-/* Serial */
-#define CONFIG_BAUDRATE 115200
-
/* Monitor Command Prompt */
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_CBSIZE SZ_2K
*/
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_BAUDRATE 115200
-
#define CONFIG_HOSTNAME "ccdc"
#define CONFIG_ROOTPATH "/opt/nfsroot"
#define CONFIG_BOOTFILE "ccdc.img"
/* UART */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE
-#define CONFIG_BAUDRATE 115200
/* USB Configs */
#ifdef CONFIG_CMD_USB
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_BAUDRATE 115200
#ifndef CONFIG_BOOTCOMMAND
#define CONFIG_BOOTCOMMAND "if run check_em_pad; then " \
/* Board Clock , P1 clock frequency (XTAL=13.33MHz) */
#define CONFIG_SYS_CLK_FREQ 66666666
-/* Serial Console */
-#define CONFIG_BAUDRATE 115200
-
/* Miscellaneous */
#define CONFIG_SYS_PBSIZE 256
#define CONFIG_CMDLINE_TAG
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
-#define CONFIG_BAUDRATE 115200
-
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */
#define PHYS_SDRAM_2_SIZE 0x100000000 /* 4 GB */
-/* Serial */
-#define CONFIG_BAUDRATE 115200
-
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 8000000 /* 8MHz */
/* LPDDR4 board total DDR is 6GB, DDR4 board total DDR is 4 GB */
#define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */
-/* Serial */
-#define CONFIG_BAUDRATE 115200
-
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 8000000 /* 8MHz */
/* LPDDR4 board total DDR is 3GB */
#define PHYS_SDRAM_2_SIZE 0x40000000 /* 1 GB */
-/* Serial */
-#define CONFIG_BAUDRATE 115200
-
/* Generic Timer Definitions */
#define COUNTER_FREQUENCY 8000000 /* 8MHz */
#endif
#define CONFIG_SYS_NS16550_CLK get_serial_clock()
-#define CONFIG_BAUDRATE 115200
-
/* I2C */
#ifndef CONFIG_DM_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
-#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/* Miscellaneous configurable options */
#define CONFIG_SYS_NS16550_REG_SIZE 1
#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
-#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#if !defined(SPL_NO_IFC) || defined(CONFIG_TARGET_LS1088AQDS)
(void *)CONFIG_SYS_SERIAL1, \
(void *)CONFIG_SYS_SERIAL2, \
(void *)CONFIG_SYS_SERIAL3 }
-#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/* MC firmware */
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_BAUDRATE 115200
/* Command definition */
#else
#error please define serial console (CONFIG_SERIAL_CONSOLE_UARTx)
#endif
-#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + 16)
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_CACHELINE_SIZE 64
*/
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x7ff00)
-/* UART Definitions */
-#define CONFIG_BAUDRATE 115200
-
/* Console configuration */
#define CONFIG_SYS_CBSIZE 1024 /* Console buffer size */
#define CONFIG_SYS_MAXARGS 64
#define CONFIG_SYS_NS16550_COM4 UART3_BASE
#define CONFIG_SYS_NS16550_COM5 UART4_BASE
#define CONFIG_SYS_NS16550_COM6 UART5_BASE
-#define CONFIG_BAUDRATE 115200
#endif /* ! __CONFIG_PDU001_H */
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
(PHYS_SDRAM_SIZE >> 1))
-#define CONFIG_BAUDRATE 115200
-
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
#define CORTINA_SERIAL_PORTS {(void *)CONFIG_SYS_SERIAL0, \
(void *)CONFIG_SYS_SERIAL1}
-#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_SERIAL0 PER_UART0_CFG
#define CONFIG_SYS_SERIAL1 PER_UART1_CFG
#include "rockchip-common.h"
#define CONFIG_SYS_MAXARGS 16
-#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_SDRAM_BASE 0
#define SDRAM_MAX_SIZE 0xff000000
-#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOOTARGS \
"rw rootfstype=ubifs ubi.mtd=6 root=ubi0:rootfs"
-#define CONFIG_BAUDRATE 115200
-
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE \