The ethernet PHY on all known Gen3 boards takes a while to come out
of reset, increase the auto-negotiation timeout to prevent it from
timing out in case the ethernet is used right after the board was
reset.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
#define CONFIG_SYS_MAXARGS 64
#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400 }
+/* PHY needs a longer autoneg timeout */
+#define PHY_ANEG_TIMEOUT 20000
+
/* MEMORY */
#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE