ARM: dts: uniphier: add PH1-Pro5 SoC support
authorMasahiro Yamada <yamada.masahiro@socionext.com>
Fri, 28 Aug 2015 13:33:14 +0000 (22:33 +0900)
committerMasahiro Yamada <yamada.masahiro@socionext.com>
Sun, 30 Aug 2015 15:29:15 +0000 (00:29 +0900)
Initial version of UniPhier PH1-Pro5 device tree.

(Imported from Linux with adjustment for SPDX License Identifier)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
arch/arm/dts/uniphier-ph1-pro5.dtsi [new file with mode: 0644]

diff --git a/arch/arm/dts/uniphier-ph1-pro5.dtsi b/arch/arm/dts/uniphier-ph1-pro5.dtsi
new file mode 100644 (file)
index 0000000..a15c7b2
--- /dev/null
@@ -0,0 +1,216 @@
+/*
+ * Device Tree Source for UniPhier PH1-Pro5 SoC
+ *
+ * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+        X11
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+       compatible = "socionext,ph1-pro5";
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               enable-method = "socionext,uniphier-smp";
+
+               cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <0>;
+               };
+
+               cpu@1 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a9";
+                       reg = <1>;
+               };
+       };
+
+       clocks {
+               arm_timer_clk: arm_timer_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <50000000>;
+               };
+
+               uart_clk: uart_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <73728000>;
+               };
+
+               i2c_clk: i2c_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <50000000>;
+               };
+       };
+
+       soc {
+               compatible = "simple-bus";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+               interrupt-parent = <&intc>;
+
+               extbus: extbus {
+                       compatible = "simple-bus";
+                       #address-cells = <2>;
+                       #size-cells = <1>;
+               };
+
+               serial0: serial@54006800 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006800 0x40>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_uart0>;
+                       interrupts = <0 33 4>;
+                       clocks = <&uart_clk>;
+               };
+
+               serial1: serial@54006900 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006900 0x40>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_uart1>;
+                       interrupts = <0 35 4>;
+                       clocks = <&uart_clk>;
+               };
+
+               serial2: serial@54006a00 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006a00 0x40>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_uart2>;
+                       interrupts = <0 37 4>;
+                       clocks = <&uart_clk>;
+               };
+
+               serial3: serial@54006b00 {
+                       compatible = "socionext,uniphier-uart";
+                       status = "disabled";
+                       reg = <0x54006b00 0x40>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_uart3>;
+                       interrupts = <0 177 4>;
+                       clocks = <&uart_clk>;
+               };
+
+               i2c0: i2c@58780000 {
+                       compatible = "socionext,uniphier-fi2c";
+                       status = "disabled";
+                       reg = <0x58780000 0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c0>;
+                       interrupts = <0 41 4>;
+                       clocks = <&i2c_clk>;
+                       clock-frequency = <100000>;
+               };
+
+               i2c1: i2c@58781000 {
+                       compatible = "socionext,uniphier-fi2c";
+                       status = "disabled";
+                       reg = <0x58781000 0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c1>;
+                       interrupts = <0 42 4>;
+                       clocks = <&i2c_clk>;
+                       clock-frequency = <100000>;
+               };
+
+               i2c2: i2c@58782000 {
+                       compatible = "socionext,uniphier-fi2c";
+                       status = "disabled";
+                       reg = <0x58782000 0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c2>;
+                       interrupts = <0 43 4>;
+                       clocks = <&i2c_clk>;
+                       clock-frequency = <100000>;
+               };
+
+               i2c3: i2c@58783000 {
+                       compatible = "socionext,uniphier-fi2c";
+                       status = "disabled";
+                       reg = <0x58783000 0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c3>;
+                       interrupts = <0 44 4>;
+                       clocks = <&i2c_clk>;
+                       clock-frequency = <100000>;
+               };
+
+               /* i2c4 does not exist */
+
+               /* chip-internal connection for DMD */
+               i2c5: i2c@58785000 {
+                       compatible = "socionext,uniphier-fi2c";
+                       reg = <0x58785000 0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       interrupts = <0 25 4>;
+                       clocks = <&i2c_clk>;
+                       clock-frequency = <400000>;
+               };
+
+               /* chip-internal connection for HDMI */
+               i2c6: i2c@58786000 {
+                       compatible = "socionext,uniphier-fi2c";
+                       reg = <0x58786000 0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       interrupts = <0 26 4>;
+                       clocks = <&i2c_clk>;
+                       clock-frequency = <400000>;
+               };
+
+               system-bus-controller-misc@59800000 {
+                       compatible = "socionext,uniphier-system-bus-controller-misc",
+                                    "syscon";
+                       reg = <0x59800000 0x2000>;
+               };
+
+               pinctrl: pinctrl@5f801000 {
+                       compatible = "socionext,ph1-pro5-pinctrl", "syscon";
+                       reg = <0x5f801000 0xe00>;
+               };
+
+               timer@60000200 {
+                       compatible = "arm,cortex-a9-global-timer";
+                       reg = <0x60000200 0x20>;
+                       interrupts = <1 11 0x304>;
+                       clocks = <&arm_timer_clk>;
+               };
+
+               timer@60000600 {
+                       compatible = "arm,cortex-a9-twd-timer";
+                       reg = <0x60000600 0x20>;
+                       interrupts = <1 13 0x304>;
+                       clocks = <&arm_timer_clk>;
+               };
+
+               intc: interrupt-controller@60001000 {
+                       compatible = "arm,cortex-a9-gic";
+                       #interrupt-cells = <3>;
+                       interrupt-controller;
+                       reg = <0x60001000 0x1000>,
+                             <0x60000100 0x100>;
+               };
+       };
+};
+
+/include/ "uniphier-pinctrl.dtsi"