ddr: altera: sdram: Clean up set_sdr_fifo_cfg()
authorMarek Vasut <marex@denx.de>
Sat, 1 Aug 2015 18:04:33 +0000 (20:04 +0200)
committerMarek Vasut <marex@denx.de>
Sat, 8 Aug 2015 12:14:26 +0000 (14:14 +0200)
Get rid of the constant clrsetbits_le32(), instead prepare the whole
content of the register once and write it at the end of the function.

Signed-off-by: Marek Vasut <marex@denx.de>
drivers/ddr/altera/sdram.c

index d8d04f4ed25934c1679100a68b60ba63e513e323..8db8dde5dd90abeae835427d26096ed51db626b2 100644 (file)
@@ -405,14 +405,14 @@ static void set_sdr_static_cfg(void)
 
 static void set_sdr_fifo_cfg(void)
 {
-       debug("Configuring FIFOCFG\n");
-       clrsetbits_le32(&sdr_ctrl->fifo_cfg, SDR_CTRLGRP_FIFOCFG_SYNCMODE_MASK,
-                       CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE <<
-                       SDR_CTRLGRP_FIFOCFG_SYNCMODE_LSB);
-
-       clrsetbits_le32(&sdr_ctrl->fifo_cfg, SDR_CTRLGRP_FIFOCFG_INCSYNC_MASK,
-                       CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC <<
+       const u32 fifo_cfg =
+               (CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_SYNCMODE <<
+                       SDR_CTRLGRP_FIFOCFG_SYNCMODE_LSB)       |
+               (CONFIG_HPS_SDR_CTRLCFG_FIFOCFG_INCSYNC <<
                        SDR_CTRLGRP_FIFOCFG_INCSYNC_LSB);
+
+       debug("Configuring FIFOCFG\n");
+       writel(fifo_cfg, &sdr_ctrl->fifo_cfg);
 }
 
 static void set_sdr_mp_weight(void)