#define bi_bar bi_immr_base
#elif defined(CONFIG_MPC5xxx)
#define bi_bar bi_mbar_base
-#elif defined(CONFIG_MPC83XX)
+#elif defined(CONFIG_MPC83xx)
#define bi_bar bi_immrbar
#elif defined(CONFIG_MPC8220)
#define bi_bar bi_mbar_base
int fixed_sdram(void);
void sdram_init(void);
-#if defined(CONFIG_DDR_ECC) && defined(CONFIG_MPC83XX)
+#if defined(CONFIG_DDR_ECC) && defined(CONFIG_MPC83xx)
void ddr_enable_ecc(unsigned int dram_size);
#endif
int fixed_sdram(void);
void sdram_init(void);
-#if defined(CONFIG_DDR_ECC) && defined(CONFIG_MPC83XX)
+#if defined(CONFIG_DDR_ECC) && defined(CONFIG_MPC83xx)
void ddr_enable_ecc(unsigned int dram_size);
#endif
}
#endif /* CONFIG_HAS_FSL_DR_USB */
-#if defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx)
+#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx)
/*
* update crypto node properties to a specified revision of the SEC
* called with sec_rev == 0 if not on an mpc8xxxE processor
printf("WARNING: could not set crypto property: %s\n",
fdt_strerror(err));
}
-#endif /* defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx) */
+#endif /* defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) */
/* Resize the fdt to its actual size + a bit of padding */
int fdt_resize(void *blob)
PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
-PLATFORM_CPPFLAGS += -DCONFIG_MPC83XX -DCONFIG_E300 \
+PLATFORM_CPPFLAGS += -DCONFIG_MPC83xx -DCONFIG_E300 \
-ffixed-r2 -msoft-float
# Use default linker script. Board port can override in board/*/config.mk
include/configs/MPC832XEPB.h
- CONFIG_MPC83XX MPC83XX family for MPC8349, MPC8360 and MPC832X
+ CONFIG_MPC83xx MPC83XX family for MPC8349, MPC8360 and MPC832X
CONFIG_MPC832X MPC832X specific
CONFIG_MPC832XEMDS MPC832XEMDS board specific
include/configs/MPC8349ITX.h
- CONFIG_MPC83XX MPC83xx family
+ CONFIG_MPC83xx MPC83xx family
CONFIG_MPC8349 MPC8349 specific
CONFIG_MPC8349ITX MPC8349E-mITX
CONFIG_MPC8349ITXGP MPC8349E-mITX-GP
include/configs/MPC8360EMDS.h
- CONFIG_MPC83XX MPC83xx family for both MPC8349 and MPC8360
+ CONFIG_MPC83xx MPC83xx family for both MPC8349 and MPC8360
CONFIG_MPC8360 MPC8360 specific
CONFIG_MPC8360EMDS MPC8360EMDS board specific
include/configs/MPC837XEMDS.h
- CONFIG_MPC83XX MPC83xx family for both MPC837x and MPC8360
+ CONFIG_MPC83xx MPC83xx family for both MPC837x and MPC8360
CONFIG_MPC837X MPC837x specific
CONFIG_MPC837XEMDS MPC837XEMDS board specific
include/configs/MPC837XERDB.h
- CONFIG_MPC83XX MPC83xx family for both MPC8349 and MPC8360
+ CONFIG_MPC83xx MPC83xx family for both MPC8349 and MPC8360
CONFIG_MPC837X MPC837x specific
CONFIG_MPC837XERDB MPC837xE-RDB board specific
#endif
#endif
unsigned long mem_clk;
-#if defined(CONFIG_MPC83XX)
+#if defined(CONFIG_MPC83xx)
/* There are other clocks in the MPC83XX */
u32 csb_clk;
#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X)
#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
u32 lbc_clk;
#endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */
-#if defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
+#if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
u32 i2c1_clk;
u32 i2c2_clk;
#endif
phys_size_t ram_size; /* RAM size */
unsigned long reloc_off; /* Relocation Offset */
unsigned long reset_status; /* reset status register at boot */
-#if defined(CONFIG_MPC83XX)
+#if defined(CONFIG_MPC83xx)
unsigned long arbiter_event_attributes;
unsigned long arbiter_event_address;
#endif
#if defined(CONFIG_MPC85xx)
#define IS_E_PROCESSOR(svr) (svr & 0x80000)
#else
-#if defined(CONFIG_MPC83XX)
+#if defined(CONFIG_MPC83xx)
#define IS_E_PROCESSOR(spridr) (!(spridr & 0x00010000))
#endif
#endif
#define CPU_TYPE_ENTRY(n, v) \
{ .name = #n, .soc_ver = SVR_##v, }
#else
-#if defined(CONFIG_MPC83XX)
+#if defined(CONFIG_MPC83xx)
#define CPU_TYPE_ENTRY(x) {#x, SPR_##x}
#endif
#endif
#if defined(CONFIG_MPC5xxx)
unsigned long bi_mbar_base; /* base of internal registers */
#endif
-#if defined(CONFIG_MPC83XX)
+#if defined(CONFIG_MPC83xx)
unsigned long bi_immrbar;
#endif
#if defined(CONFIG_MPC8220)
#include <mpc85xx.h>
#include <asm/immap_85xx.h>
#endif
-#ifdef CONFIG_MPC83XX
+#ifdef CONFIG_MPC83xx
#include <mpc83xx.h>
#include <asm/immap_83xx.h>
#endif
defined (CONFIG_MPC8220) || \
defined (CONFIG_MPC85xx) || \
defined (CONFIG_MPC86xx) || \
- defined (CONFIG_MPC83XX)
+ defined (CONFIG_MPC83xx)
unsigned char in8(unsigned int);
void out8(unsigned int, unsigned char);
unsigned short in16(unsigned int);
void out16(unsigned int, unsigned short value);
#endif
-#if defined (CONFIG_MPC83XX)
+#if defined (CONFIG_MPC83xx)
void ppcDWload(unsigned int *addr, unsigned int *ret);
void ppcDWstore(unsigned int *addr, unsigned int *value);
#endif
int cpu_init_r (void);
#if defined(CONFIG_8260)
int prt_8260_rsr (void);
-#elif defined(CONFIG_MPC83XX)
+#elif defined(CONFIG_MPC83xx)
int prt_83xx_rsr (void);
#endif
* High Level Configuration Options
*/
#define CONFIG_E300 1
-#define CONFIG_MPC83XX 1
+#define CONFIG_MPC83xx 1
#define CONFIG_MPC831X 1
#define CONFIG_MPC8313 1
#define CONFIG_MPC8313ERDB 1
* High Level Configuration Options
*/
#define CONFIG_E300 1 /* E300 family */
-#define CONFIG_MPC83XX 1 /* MPC83xx family */
+#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC831X 1 /* MPC831x CPU family */
#define CONFIG_MPC8315 1 /* MPC8315 CPU specific */
#define CONFIG_MPC8315ERDB 1 /* MPC8315ERDB board specific */
*/
#define CONFIG_E300 1 /* E300 family */
#define CONFIG_QE 1 /* Has QE */
-#define CONFIG_MPC83XX 1 /* MPC83xx family */
+#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC832X 1 /* MPC832x CPU specific */
#define CONFIG_PCI 1
*/
#define CONFIG_E300 1 /* E300 family */
#define CONFIG_QE 1 /* Has QE */
-#define CONFIG_MPC83XX 1 /* MPC83xx family */
+#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC832X 1 /* MPC832x CPU specific */
#define CONFIG_MPC832XEMDS 1 /* MPC832XEMDS board specific */
#undef CONFIG_PQ_MDS_PIB /* POWERQUICC MDS Platform IO Board */
* High Level Configuration Options
*/
#define CONFIG_E300 1 /* E300 Family */
-#define CONFIG_MPC83XX 1 /* MPC83XX family */
+#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC834X 1 /* MPC834X family */
#define CONFIG_MPC8349 1 /* MPC8349 specific */
#define CONFIG_MPC8349EMDS 1 /* MPC8349EMDS board specific */
*/
#define CONFIG_E300 1 /* E300 family */
#define CONFIG_QE 1 /* Has QE */
-#define CONFIG_MPC83XX 1 /* MPC83XX family */
+#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC8360 1 /* MPC8360 CPU specific */
#define CONFIG_MPC8360EMDS 1 /* MPC8360EMDS board specific */
#undef CONFIG_PQ_MDS_PIB /* POWERQUICC MDS Platform IO Board */
*/
#define CONFIG_E300 1 /* E300 family */
#define CONFIG_QE 1 /* Has QE */
-#define CONFIG_MPC83XX 1 /* MPC83XX family */
+#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC8360 1 /* MPC8360 CPU specific */
#define CONFIG_MPC8360ERDK 1 /* MPC8360ERDK board specific */
* High Level Configuration Options
*/
#define CONFIG_E300 1 /* E300 family */
-#define CONFIG_MPC83XX 1 /* MPC83XX family */
+#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC837X 1 /* MPC837X CPU specific */
#define CONFIG_MPC837XEMDS 1 /* MPC837XEMDS board specific */
* High Level Configuration Options
*/
#define CONFIG_E300 1 /* E300 family */
-#define CONFIG_MPC83XX 1 /* MPC83XX family */
+#define CONFIG_MPC83xx 1 /* MPC83XX family */
#define CONFIG_MPC837X 1 /* MPC837X CPU specific */
#define CONFIG_MPC837XERDB 1
* High Level Configuration Options
*/
#define CONFIG_E300 1
-#define CONFIG_MPC83XX 1
+#define CONFIG_MPC83xx 1
#define CONFIG_MPC834X 1
#define CONFIG_MPC8343 1
#define CONFIG_NAND_U_BOOT
#define CONFIG_E300 1
-#define CONFIG_MPC83XX 1
+#define CONFIG_MPC83xx 1
#define CONFIG_MPC831X 1
#define CONFIG_MPC8313 1
* High Level Configuration Options
*/
#define CONFIG_E300 1 /* E300 Family */
-#define CONFIG_MPC83XX 1 /* MPC83XX family */
+#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC834X 1 /* MPC834X specific */
#define CONFIG_MPC8349 1 /* MPC8349 specific */
#define CONFIG_TQM834X 1 /* TQM834X board specific */
*/
#define CONFIG_E300 1 /* E300 family */
#define CONFIG_QE 1 /* Has QE */
-#define CONFIG_MPC83XX 1 /* MPC83XX family */
+#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC8360 1 /* MPC8360 CPU specific */
#define CONFIG_KMETER1 1 /* KMETER1 board specific */
#define CONFIG_HOSTNAME kmeter1
* High Level Configuration Options
*/
#define CONFIG_E300 1 /* E300 Family */
-#define CONFIG_MPC83XX 1 /* MPC83XX family */
+#define CONFIG_MPC83xx 1 /* MPC83xx family */
#define CONFIG_MPC834X 1 /* MPC834X family */
#define CONFIG_MPC8349 1 /* MPC8349 specific */
#define CONFIG_SBC8349 1 /* WRS SBC8349 board specific */
static inline void fdt_fixup_dr_usb(void *blob, bd_t *bd) {}
#endif /* CONFIG_HAS_FSL_DR_USB */
-#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC83XX)
+#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC83xx)
void fdt_fixup_crypto_node(void *blob, int sec_rev);
#else
static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {}
/* FIXME: Should these be pushed back to 83xx and 85xx config files? */
#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) \
- || defined(CONFIG_MPC83XX)
+ || defined(CONFIG_MPC83xx)
#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET)
#endif
prt_8260_rsr,
prt_8260_clks,
#endif /* CONFIG_8260 */
-#if defined(CONFIG_MPC83XX)
+#if defined(CONFIG_MPC83xx)
prt_83xx_rsr,
#endif
checkcpu,
/* compiler optimization barrier needed for GCC >= 3.4 */
__asm__ __volatile__("": : :"memory");
-#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC83XX) && \
+#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC83xx) && \
!defined(CONFIG_MPC85xx) && !defined(CONFIG_MPC86xx)
/* Clear initial global data */
memset ((void *) gd, 0, sizeof (gd_t));
#if defined(CONFIG_MPC5xxx)
bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
#endif
-#if defined(CONFIG_MPC83XX)
+#if defined(CONFIG_MPC83xx)
bd->bi_immrbar = CONFIG_SYS_IMMR;
#endif
#if defined(CONFIG_MPC8220)
WATCHDOG_RESET();
-#if defined(CONFIG_SYS_DELAYED_ICACHE) || defined(CONFIG_MPC83XX)
+#if defined(CONFIG_SYS_DELAYED_ICACHE) || defined(CONFIG_MPC83xx)
icache_enable (); /* it's time to enable the instruction cache */
#endif