#define QIXIS_LBMAP_BRDCFG_REG 0x00
#endif
+#ifndef QIXIS_RCFG_CTL_RECONFIG_IDLE
+#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
+#endif
+#ifndef QIXIS_RCFG_CTL_RECONFIG_START
+#define QIXIS_RCFG_CTL_RECONFIG_START 0x21
+#endif
+
#ifdef CONFIG_SYS_I2C_FPGA_ADDR
u8 qixis_read_i2c(unsigned int reg)
{
QIXIS_WRITE(rst_ctl, QIXIS_RST_CTL_RESET);
}
+#ifdef QIXIS_LBMAP_ALTBANK
static void qixis_bank_reset(void)
{
QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_IDLE);
QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_START);
}
+#endif
static void __maybe_unused set_lbmap(int lbmap)
{
static void __maybe_unused set_rcw_src(int rcw_src)
{
+#ifdef CONFIG_NXP_LSCH3_2
+ QIXIS_WRITE(dutcfg[0], (rcw_src & 0xff));
+#else
u8 reg;
reg = QIXIS_READ(dutcfg[1]);
reg = (reg & ~1) | (rcw_src & 1);
QIXIS_WRITE(dutcfg[1], reg);
QIXIS_WRITE(dutcfg[0], (rcw_src >> 1) & 0xff);
+#endif
}
static void qixis_dump_regs(void)
set_lbmap(QIXIS_LBMAP_DFLTBANK);
qixis_reset();
} else if (strcmp(argv[1], "altbank") == 0) {
+#ifdef QIXIS_LBMAP_ALTBANK
set_lbmap(QIXIS_LBMAP_ALTBANK);
qixis_bank_reset();
+#else
+ printf("No Altbank!\n");
+#endif
} else if (strcmp(argv[1], "nand") == 0) {
#ifdef QIXIS_LBMAP_NAND
QIXIS_WRITE(rst_ctl, 0x30);
QIXIS_WRITE(rcfg_ctl, 0);
set_lbmap(QIXIS_LBMAP_NAND);
set_rcw_src(QIXIS_RCW_SRC_NAND);
- QIXIS_WRITE(rcfg_ctl, 0x20);
- QIXIS_WRITE(rcfg_ctl, 0x21);
+ QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_IDLE);
+ QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_START);
#else
printf("Not implemented\n");
#endif
set_lbmap(QIXIS_LBMAP_SD);
set_rcw_src(QIXIS_RCW_SRC_SD);
#endif
- QIXIS_WRITE(rcfg_ctl, 0x20);
- QIXIS_WRITE(rcfg_ctl, 0x21);
+ QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_IDLE);
+ QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_START);
#else
printf("Not implemented\n");
#endif
QIXIS_WRITE(rcfg_ctl, 0);
set_lbmap(QIXIS_LBMAP_IFC);
set_rcw_src(QIXIS_RCW_SRC_IFC);
- QIXIS_WRITE(rcfg_ctl, 0x20);
- QIXIS_WRITE(rcfg_ctl, 0x21);
+ QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_IDLE);
+ QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_START);
#else
printf("Not implemented\n");
#endif
QIXIS_WRITE(rcfg_ctl, 0);
set_lbmap(QIXIS_LBMAP_EMMC);
set_rcw_src(QIXIS_RCW_SRC_EMMC);
- QIXIS_WRITE(rcfg_ctl, 0x20);
- QIXIS_WRITE(rcfg_ctl, 0x21);
+ QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_IDLE);
+ QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_START);
#else
printf("Not implemented\n");
#endif
QIXIS_WRITE(rcfg_ctl, 0);
set_lbmap(QIXIS_LBMAP_SD_QSPI);
set_rcw_src(QIXIS_RCW_SRC_SD);
- qixis_write_i2c(offsetof(struct qixis, rcfg_ctl), 0x20);
- qixis_write_i2c(offsetof(struct qixis, rcfg_ctl), 0x21);
+ qixis_write_i2c(offsetof(struct qixis, rcfg_ctl),
+ QIXIS_RCFG_CTL_RECONFIG_IDLE);
+ qixis_write_i2c(offsetof(struct qixis, rcfg_ctl),
+ QIXIS_RCFG_CTL_RECONFIG_START);
#else
printf("Not implemented\n");
#endif
QIXIS_WRITE(rcfg_ctl, 0);
set_lbmap(QIXIS_LBMAP_QSPI);
set_rcw_src(QIXIS_RCW_SRC_QSPI);
- qixis_write_i2c(offsetof(struct qixis, rcfg_ctl), 0x20);
- qixis_write_i2c(offsetof(struct qixis, rcfg_ctl), 0x21);
+ qixis_write_i2c(offsetof(struct qixis, rcfg_ctl),
+ QIXIS_RCFG_CTL_RECONFIG_IDLE);
+ qixis_write_i2c(offsetof(struct qixis, rcfg_ctl),
+ QIXIS_RCFG_CTL_RECONFIG_START);
#else
printf("Not implemented\n");
#endif