#define DAVINCI_GPIO_BANK8 0x01E260B0
#endif /* CONFIG_SOC_DA8XX */
-struct davinci_gpio {
- unsigned int dir;
- unsigned int out_data;
- unsigned int set_data;
- unsigned int clr_data;
- unsigned int in_data;
- unsigned int set_rising;
- unsigned int clr_rising;
- unsigned int set_falling;
- unsigned int clr_falling;
- unsigned int intstat;
-};
-
-struct davinci_gpio_bank {
- int num_gpio;
- unsigned int irq_num;
- unsigned int irq_mask;
- unsigned long *in_use;
- struct davinci_gpio *base;
-};
-
#define davinci_gpio_bank01 ((struct davinci_gpio *)DAVINCI_GPIO_BANK01)
#define davinci_gpio_bank23 ((struct davinci_gpio *)DAVINCI_GPIO_BANK23)
#define davinci_gpio_bank45 ((struct davinci_gpio *)DAVINCI_GPIO_BANK45)
#define MAX_NUM_GPIOS 144
#endif
#define GPIO_BANK(gp) (davinci_gpio_bank01 + ((gp) >> 5))
-#define GPIO_BIT(gp) ((gp) & 0x1F)
void gpio_info(void);
-#ifdef CONFIG_DM_GPIO
-
-/* Information about a GPIO bank */
-struct davinci_gpio_platdata {
- int bank_index;
- ulong base; /* address of registers in physical memory */
- const char *port_name;
-};
-#endif
-
#endif
#include <asm/arch/pinmux_defs.h>
#include <asm/arch/davinci_misc.h>
#include <asm/arch/timer_defs.h>
+#include "../../../drivers/gpio/da8xx_gpio.h"
DECLARE_GLOBAL_DATA_PTR;
#include <fdtdec.h>
#include <asm/io.h>
#include <asm/gpio.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/davinci_misc.h>
#include <dt-bindings/gpio/gpio.h>
+#include "da8xx_gpio.h"
+
#ifndef CONFIG_DM_GPIO
+#include <asm/arch/hardware.h>
+#include <asm/arch/davinci_misc.h>
+
static struct gpio_registry {
int is_registered;
char name[GPIO_NAME_SIZE];
--- /dev/null
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef _GPIO_DA8XX_DEFS_H_
+#define _GPIO_DA8XX_DEFS_H_
+
+struct davinci_gpio {
+ unsigned int dir;
+ unsigned int out_data;
+ unsigned int set_data;
+ unsigned int clr_data;
+ unsigned int in_data;
+ unsigned int set_rising;
+ unsigned int clr_rising;
+ unsigned int set_falling;
+ unsigned int clr_falling;
+ unsigned int intstat;
+};
+
+struct davinci_gpio_bank {
+ int num_gpio;
+ unsigned int irq_num;
+ unsigned int irq_mask;
+ unsigned long *in_use;
+ struct davinci_gpio *base;
+};
+
+#define GPIO_NAME_SIZE 20
+#define MAX_NUM_GPIOS 144
+#define GPIO_BIT(gp) ((gp) & 0x1F)
+
+#ifdef CONFIG_DM_GPIO
+
+/* Information about a GPIO bank */
+struct davinci_gpio_platdata {
+ int bank_index;
+ ulong base; /* address of registers in physical memory */
+ const char *port_name;
+};
+#endif
+
+#endif