watchdog: Add support for Xilinx Microblaze watchdog

Watchdog can be used on Microblaze, PPC and Zynq hw designs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>

diff --git a/arch/microblaze/include/asm/processor.h b/arch/microblaze/include/asm/processor.h
index 2c4d5ffc5cbbb8e779272109dd37510754ae7353..d33faeb7d102607c3f03707594cdbd907ca51f37 100644 (file)
--- a/arch/microblaze/include/asm/processor.h
+++ b/arch/microblaze/include/asm/processor.h
@@ -31,4 +31,8 @@ extern char __text_start[];
 /* Microblaze board initialization function */
 void board_init(void);
 
+/* Watchdog functions */
+extern int hw_watchdog_init(void);
+extern void hw_watchdog_disable(void);
+
 #endif /* __ASM_MICROBLAZE_PROCESSOR_H */

diff --git a/arch/microblaze/lib/board.c b/arch/microblaze/lib/board.c
index a7c2f7623392fc1fce53dd2eb992a6f74d8620d7..815fb5a0c95216d729178897316c6e44d6c2dff6 100644 (file)
--- a/arch/microblaze/lib/board.c
+++ b/arch/microblaze/lib/board.c
@@ -61,6 +61,9 @@ init_fnc_t *init_sequence[] = {
        serial_init,
        console_init_f,
        interrupts_init,
+#ifdef CONFIG_XILINX_TB_WATCHDOG
+       hw_watchdog_init,
+#endif
        timer_init,
        NULL,
 };

diff --git a/board/xilinx/microblaze-generic/microblaze-generic.c b/board/xilinx/microblaze-generic/microblaze-generic.c
index 1af0b86c75f44e13572a86e0dde7dea3825394a5..befbb3a3e59afb4e1c4a1326da2fdeeb835938b3 100644 (file)
--- a/board/xilinx/microblaze-generic/microblaze-generic.c
+++ b/board/xilinx/microblaze-generic/microblaze-generic.c
@@ -39,6 +39,10 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
            ++(*((unsigned long *)(CONFIG_SYS_GPIO_0_ADDR)));
 #endif
 
+#ifdef CONFIG_XILINX_TB_WATCHDOG
+       hw_watchdog_disable();
+#endif
+
        puts ("Reseting board\n");
        __asm__ __volatile__ (" mts rmsr, r0;" \
                                "bra r0");

diff --git a/board/xilinx/microblaze-generic/xparameters.h b/board/xilinx/microblaze-generic/xparameters.h
index 50a82d94a06ee455c820ec809465b29dff57606f..c846f97f5b7db2678a846bc73e6e5328e1bddbbc 100644 (file)
--- a/board/xilinx/microblaze-generic/xparameters.h
+++ b/board/xilinx/microblaze-generic/xparameters.h
@@ -77,3 +77,7 @@
 #define XILINX_LLTEMAC_SDMA_CTRL_BASEADDR      0x42000180
 #define XILINX_LLTEMAC_BASEADDR1               0x44200000
 #define XILINX_LLTEMAC_FIFO_BASEADDR1          0x42100000
+
+/* Watchdog IP is wxi_timebase_wdt_0 */
+#define XILINX_WATCHDOG_BASEADDR       0x50000000
+#define XILINX_WATCHDOG_IRQ            1

diff --git a/doc/README.watchdog b/doc/README.watchdog
index ee65008b4bebe565b1d05f460cd37f56c25dc3ce..33f31c2140573222932aae8f376de9eed9c70b8c 100644 (file)
--- a/doc/README.watchdog
+++ b/doc/README.watchdog
@@ -27,3 +27,6 @@ CONFIG_IMX_WATCHDOG
        Available for i.mx31/35/5x/6x to service the watchdog. This is not
        automatically set because some boards (vision2) still need to define
        their own hw_watchdog_reset routine.
+
+CONFIG_XILINX_TB_WATCHDOG
+       Available for Xilinx Axi platforms to service timebase watchdog timer.

diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index b1f4e0f03f8b2b96222518bc6ea54d234995d743..13e7c376861a67c167392b5c8f2448e8b24fd5c8 100644 (file)
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -32,6 +32,7 @@ COBJS-y += imx_watchdog.o
 endif
 COBJS-$(CONFIG_TNETV107X_WATCHDOG) += tnetv107x_wdt.o
 COBJS-$(CONFIG_S5P)               += s5p_wdt.o
+COBJS-$(CONFIG_XILINX_TB_WATCHDOG) += xilinx_tb_wdt.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)

diff --git a/drivers/watchdog/xilinx_tb_wdt.c b/drivers/watchdog/xilinx_tb_wdt.c
new file mode 100644 (file)
index 0000000..f7c722e
--- /dev/null
+++ b/drivers/watchdog/xilinx_tb_wdt.c
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2011-2013 Xilinx Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/microblaze_intc.h>
+#include <asm/processor.h>
+#include <watchdog.h>
+
+#define XWT_CSR0_WRS_MASK      0x00000008 /* Reset status Mask */
+#define XWT_CSR0_WDS_MASK      0x00000004 /* Timer state Mask */
+#define XWT_CSR0_EWDT1_MASK    0x00000002 /* Enable bit 1 Mask*/
+#define XWT_CSRX_EWDT2_MASK    0x00000001 /* Enable bit 2 Mask */
+
+struct watchdog_regs {
+       u32 twcsr0; /* 0x0 */
+       u32 twcsr1; /* 0x4 */
+       u32 tbr; /* 0x8 */
+};
+
+static struct watchdog_regs *watchdog_base =
+                       (struct watchdog_regs *)CONFIG_WATCHDOG_BASEADDR;
+
+void hw_watchdog_reset(void)
+{
+       u32 reg;
+
+       /* Read the current contents of TCSR0 */
+       reg = readl(&watchdog_base->twcsr0);
+
+       /* Clear the watchdog WDS bit */
+       if (reg & (XWT_CSR0_EWDT1_MASK | XWT_CSRX_EWDT2_MASK))
+               writel(reg | XWT_CSR0_WDS_MASK, &watchdog_base->twcsr0);
+}
+
+void hw_watchdog_disable(void)
+{
+       u32 reg;
+
+       /* Read the current contents of TCSR0 */
+       reg = readl(&watchdog_base->twcsr0);
+
+       writel(reg & ~XWT_CSR0_EWDT1_MASK, &watchdog_base->twcsr0);
+       writel(~XWT_CSRX_EWDT2_MASK, &watchdog_base->twcsr1);
+
+       puts("Watchdog disabled!\n");
+}
+
+static void hw_watchdog_isr(void *arg)
+{
+       hw_watchdog_reset();
+}
+
+int hw_watchdog_init(void)
+{
+       int ret;
+
+       writel((XWT_CSR0_WRS_MASK | XWT_CSR0_WDS_MASK | XWT_CSR0_EWDT1_MASK),
+              &watchdog_base->twcsr0);
+       writel(XWT_CSRX_EWDT2_MASK, &watchdog_base->twcsr1);
+
+       ret = install_interrupt_handler(CONFIG_WATCHDOG_IRQ,
+                                               hw_watchdog_isr, NULL);
+       if (ret)
+               return 1;
+
+       return 0;
+}

diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index 8c0353a15db95b9967e2ab8c421fb5041aadb623..0c4e7193ba7605cecb606c226fdd9938486ee72e 100644 (file)
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -120,6 +120,14 @@
 #  define CONFIG_SYS_TIMER_0_IRQ       XILINX_TIMER_IRQ
 #endif
 
+/* watchdog */
+#if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
+# define CONFIG_WATCHDOG_BASEADDR      XILINX_WATCHDOG_BASEADDR
+# define CONFIG_WATCHDOG_IRQ           XILINX_WATCHDOG_IRQ
+# define CONFIG_HW_WATCHDOG
+# define CONFIG_XILINX_TB_WATCHDOG
+#endif
+
 /*
  * memory layout - Example
  * CONFIG_SYS_TEXT_BASE = 0x1200_0000; defined in config.mk