85xx: Add basic e500mc core support

Introduce CONFIG_E500MC to deal with the minor differences between
e500v2 and e500mc.

* Certain fields of HID0/1 don't exist anymore on e500mc
* Cache line size is 64-bytes on e500mc
* reset value of PIR is different

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index b8f9125c73be1a0698a83b44e4966c14179de331..c78068786650582d0bffeb33d8cb246e7e20e5f1 100644 (file)
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -134,6 +134,10 @@ int checkcpu (void)
            puts("Unknown");
            break;
        }
+
+       if (PVR_MEM(pvr) == 0x03)
+               puts("MC");
+
        printf(", Version: %d.%d, (0x%08x)\n", major, minor, pvr);
 
        get_sys_info(&sysinfo);

diff --git a/cpu/mpc85xx/release.S b/cpu/mpc85xx/release.S
index ec5e4daf88f1b09838f4a425f4742fe7acb1024e..7c3e8a1725aac6ebfb8611718bcd292e8331d43b 100644 (file)
--- a/cpu/mpc85xx/release.S
+++ b/cpu/mpc85xx/release.S
@@ -24,14 +24,18 @@
 __secondary_start_page:
 /* First do some preliminary setup */
        lis     r3, HID0_EMCP@h         /* enable machine check */
+#ifndef CONFIG_E500MC
        ori     r3,r3,HID0_TBEN@l       /* enable Timebase */
+#endif
 #ifdef CONFIG_PHYS_64BIT
        ori     r3,r3,HID0_ENMAS7@l     /* enable MAS7 updates */
 #endif
        mtspr   SPRN_HID0,r3
 
+#ifndef CONFIG_E500MC
        li      r3,(HID1_ASTME|HID1_ABE)@l      /* Addr streaming & broadcast */
        mtspr   SPRN_HID1,r3
+#endif
 
        /* Enable branch prediction */
        li      r3,0x201
@@ -64,7 +68,11 @@ __secondary_start_page:
 
        /* r10 has the base address for the entry */
        mfspr   r0,SPRN_PIR
+#ifdef CONFIG_E500MC
+       rlwinm  r4,r0,27,27,31
+#else
        mr      r4,r0
+#endif
        slwi    r8,r4,5
        add     r10,r3,r8
 

diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
index f16d4c0c40547539427db30816e2afde79fd7551..651ff1c02c9cbb04a2ea8bbe2246bde2cfda2e3f 100644 (file)
--- a/cpu/mpc85xx/start.S
+++ b/cpu/mpc85xx/start.S
@@ -163,8 +163,10 @@ _start_e500:
        ori     r0,r0,HID0_TBEN@l       /* Enable Timebase */
        mtspr   HID0,r0
 
+#ifndef CONFIG_E500MC
        li      r0,(HID1_ASTME|HID1_ABE)@l      /* Addr streaming & broadcast */
        mtspr   HID1,r0
+#endif
 
        /* Enable Branch Prediction */
 #if defined(CONFIG_BTB)

diff --git a/include/asm-ppc/cache.h b/include/asm-ppc/cache.h
index 7252be7db2d686832d4c6a5b5781e205f6b581f8..53e8d05f50b1a251484e8be719ab216350e1c6b5 100644 (file)
--- a/include/asm-ppc/cache.h
+++ b/include/asm-ppc/cache.h
@@ -12,6 +12,8 @@
 #define        L1_CACHE_SHIFT  4
 #elif defined(CONFIG_PPC64BRIDGE)
 #define L1_CACHE_SHIFT 7
+#elif defined(CONFIG_E500MC)
+#define L1_CACHE_SHIFT 6
 #else
 #define        L1_CACHE_SHIFT  5
 #endif