ARM: rmobile: Convert TPL to SPL
authorMarek Vasut <marek.vasut+renesas@gmail.com>
Fri, 13 Apr 2018 21:13:00 +0000 (23:13 +0200)
committerMarek Vasut <marex@denx.de>
Fri, 13 Apr 2018 21:41:45 +0000 (23:41 +0200)
There is currently no use for building the SPL anymore, since the
SPI loader can easily be replaced by TPL and TPL does load U-Boot
directly. Upgrade TPL to SPL and replace what used to be SPL with
it. This way we build the U-Boot sources only twice, not thrice.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
arch/arm/mach-rmobile/Kconfig.32
arch/arm/mach-rmobile/include/mach/boot0.h
arch/arm/mach-rmobile/lowlevel_init_ca15.S
board/renesas/porter/porter_spl.c
board/renesas/stout/stout_spl.c
configs/porter_defconfig
configs/stout_defconfig
include/configs/porter.h
include/configs/stout.h

index d5b00ef3796ac1e08ddda80b5218ce8caaf903de..bcadb21ba9f2b24696aa2b79aed3031fd93ada56 100644 (file)
@@ -70,21 +70,17 @@ config TARGET_PORTER
        bool "Porter board"
        select DM
        select DM_SERIAL
-       select SUPPORT_TPL
        select SUPPORT_SPL
-       select SPL_DM if SPL
        select USE_TINY_PRINTF
-       select TPL_TINY_MEMSET
+       select SPL_TINY_MEMSET
 
 config TARGET_STOUT
        bool "Stout board"
        select DM
        select DM_SERIAL
-       select SUPPORT_TPL
        select SUPPORT_SPL
-       select SPL_DM if SPL
        select USE_TINY_PRINTF
-       select TPL_TINY_MEMSET
+       select SPL_TINY_MEMSET
 
 endchoice
 
index 3edd461cbf1e5733ec3d1a1d4e175cfb39015aae..61044698bf812376b3f4eeb7e11c802dfea1e72c 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Specialty padding for the RCar Gen2 TPL JTAG loading
+ * Specialty padding for the RCar Gen2 SPL JTAG loading
  *
  * SPDX-License-Identifier:    GPL-2.0
  */
@@ -10,7 +10,7 @@
 _start:
        ARM_VECTORS
 
-#ifdef CONFIG_TPL_BUILD
+#ifdef CONFIG_SPL_BUILD
        .word   0x0badc0d3;
        .word   0x0badc0d3;
        .word   0x0badc0d3;
index ef2280bea4216816c7fea4ca040cfb3df3cb5a7c..806a3bc2f995b4b41aebb4ddbb4d17e2adfed596 100644 (file)
@@ -11,7 +11,7 @@
 #include <linux/linkage.h>
 
 ENTRY(lowlevel_init)
-#ifndef CONFIG_TPL_BUILD
+#ifndef CONFIG_SPL_BUILD
        mrc     p15, 0, r4, c0, c0, 5 /* mpidr */
        orr     r4, r4, r4, lsr #6
        and     r4, r4, #7 /* id 0-3 = ca15.0,1,2,3 */
index 4b4dd4d4aa5a7c083bdb3c528ab0590a64468367..55f4cace0cdfef907501c1ff3d277ef8386f3779 100644 (file)
@@ -27,7 +27,6 @@
 #define SD2CKCR                0xE615026C
 #define SD_97500KHZ    0x7
 
-#ifdef CONFIG_TPL_BUILD
 struct reg_config {
        u16     off;
        u32     val;
@@ -45,7 +44,7 @@ static void dbsc_wait(u16 reg)
                ;
 }
 
-static void tpl_init_sys(void)
+static void spl_init_sys(void)
 {
        u32 r0 = 0;
 
@@ -65,7 +64,7 @@ static void tpl_init_sys(void)
                :"=r"(r0));
 }
 
-static void tpl_init_pfc(void)
+static void spl_init_pfc(void)
 {
        static const struct reg_config pfc_with_unlock[] = {
                { 0x0090, 0x60000000 },
@@ -125,7 +124,7 @@ static void tpl_init_pfc(void)
                       pfc_base | pfc_without_unlock[i].off);
 }
 
-static void tpl_init_gpio(void)
+static void spl_init_gpio(void)
 {
        static const u16 gpio_offs[] = {
                0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x5400, 0x5800
@@ -164,7 +163,7 @@ static void tpl_init_gpio(void)
                writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off);
 }
 
-static void tpl_init_lbsc(void)
+static void spl_init_lbsc(void)
 {
        static const struct reg_config lbsc_config[] = {
                { 0x00, 0x00000020 },
@@ -192,7 +191,7 @@ static void tpl_init_lbsc(void)
                writel(0, lbsc_base | lbsc_offs[i]);
 }
 
-static void tpl_init_dbsc(void)
+static void spl_init_dbsc(void)
 {
        static const struct reg_config dbsc_config1[] = {
                { 0x0280, 0x0000a55a },
@@ -412,7 +411,7 @@ static void tpl_init_dbsc(void)
 
 }
 
-static void tpl_init_qspi(void)
+static void spl_init_qspi(void)
 {
        mstp_clrbits_le32(MSTPSR9, SMSTPCR9, QSPI_MSTP917);
 
@@ -446,14 +445,13 @@ void board_init_f(ulong dummy)
         */
        writel(SD_97500KHZ, SD2CKCR);
 
-       tpl_init_sys();
-       tpl_init_pfc();
-       tpl_init_gpio();
-       tpl_init_lbsc();
-       tpl_init_dbsc();
-       tpl_init_qspi();
+       spl_init_sys();
+       spl_init_pfc();
+       spl_init_gpio();
+       spl_init_lbsc();
+       spl_init_dbsc();
+       spl_init_qspi();
 }
-#endif
 
 void spl_board_init(void)
 {
@@ -463,18 +461,17 @@ void spl_board_init(void)
 
 void board_boot_order(u32 *spl_boot_list)
 {
-#ifdef CONFIG_TPL_BUILD
        const u32 jtag_magic = 0x1337c0de;
        const u32 load_magic = 0xb33fc0de;
 
        /*
         * If JTAG probe sets special word at 0xe6300020, then it must
-        * put U-Boot into RAM and TPL will start it from RAM.
+        * put U-Boot into RAM and SPL will start it from RAM.
         */
-       if (readl(CONFIG_TPL_TEXT_BASE + 0x20) == jtag_magic) {
+       if (readl(CONFIG_SPL_TEXT_BASE + 0x20) == jtag_magic) {
                printf("JTAG boot detected!\n");
 
-               while (readl(CONFIG_TPL_TEXT_BASE + 0x24) != load_magic)
+               while (readl(CONFIG_SPL_TEXT_BASE + 0x24) != load_magic)
                        ;
 
                spl_boot_list[0] = BOOT_DEVICE_RAM;
@@ -482,7 +479,6 @@ void board_boot_order(u32 *spl_boot_list)
 
                return;
        }
-#endif
 
        /* Boot from SPI NOR with YMODEM UART fallback. */
        spl_boot_list[0] = BOOT_DEVICE_SPI;
index 1b061756bcbedab357bb3bce80edf82d4f71a084..ed443fdcc2bf62b01ffda9c0ec6ee261446a2406 100644 (file)
@@ -27,7 +27,6 @@
 #define SD2CKCR                0xE615026C
 #define SD_97500KHZ    0x7
 
-#ifdef CONFIG_TPL_BUILD
 struct reg_config {
        u16     off;
        u32     val;
@@ -45,7 +44,7 @@ static void dbsc_wait(u16 reg)
                ;
 }
 
-static void tpl_init_sys(void)
+static void spl_init_sys(void)
 {
        u32 r0 = 0;
 
@@ -65,7 +64,7 @@ static void tpl_init_sys(void)
                :"=r"(r0));
 }
 
-static void tpl_init_pfc(void)
+static void spl_init_pfc(void)
 {
        static const struct reg_config pfc_with_unlock[] = {
                { 0x0090, 0x00140300 },
@@ -120,7 +119,7 @@ static void tpl_init_pfc(void)
                       pfc_base | pfc_without_unlock[i].off);
 }
 
-static void tpl_init_gpio(void)
+static void spl_init_gpio(void)
 {
        static const u16 gpio_offs[] = {
                0x1000, 0x3000, 0x4000, 0x5000
@@ -155,7 +154,7 @@ static void tpl_init_gpio(void)
                writel(gpio_clr[i].val, gpio_base | 0x04 | gpio_clr[i].off);
 }
 
-static void tpl_init_lbsc(void)
+static void spl_init_lbsc(void)
 {
        static const struct reg_config lbsc_config[] = {
                { 0x00, 0x00000020 },
@@ -183,7 +182,7 @@ static void tpl_init_lbsc(void)
                writel(0, lbsc_base | lbsc_offs[i]);
 }
 
-static void tpl_init_dbsc(void)
+static void spl_init_dbsc(void)
 {
        static const struct reg_config dbsc_config1[] = {
                { 0x0280, 0x0000a55a },
@@ -398,7 +397,7 @@ static void tpl_init_dbsc(void)
 
 }
 
-static void tpl_init_qspi(void)
+static void spl_init_qspi(void)
 {
        mstp_clrbits_le32(MSTPSR9, SMSTPCR9, QSPI_MSTP917);
 
@@ -432,14 +431,13 @@ void board_init_f(ulong dummy)
         */
        writel(SD_97500KHZ, SD2CKCR);
 
-       tpl_init_sys();
-       tpl_init_pfc();
-       tpl_init_gpio();
-       tpl_init_lbsc();
-       tpl_init_dbsc();
-       tpl_init_qspi();
+       spl_init_sys();
+       spl_init_pfc();
+       spl_init_gpio();
+       spl_init_lbsc();
+       spl_init_dbsc();
+       spl_init_qspi();
 }
-#endif
 
 void spl_board_init(void)
 {
@@ -449,18 +447,17 @@ void spl_board_init(void)
 
 void board_boot_order(u32 *spl_boot_list)
 {
-#ifdef CONFIG_TPL_BUILD
        const u32 jtag_magic = 0x1337c0de;
        const u32 load_magic = 0xb33fc0de;
 
        /*
         * If JTAG probe sets special word at 0xe6300020, then it must
-        * put U-Boot into RAM and TPL will start it from RAM.
+        * put U-Boot into RAM and SPL will start it from RAM.
         */
-       if (readl(CONFIG_TPL_TEXT_BASE + 0x20) == jtag_magic) {
+       if (readl(CONFIG_SPL_TEXT_BASE + 0x20) == jtag_magic) {
                printf("JTAG boot detected!\n");
 
-               while (readl(CONFIG_TPL_TEXT_BASE + 0x24) != load_magic)
+               while (readl(CONFIG_SPL_TEXT_BASE + 0x24) != load_magic)
                        ;
 
                spl_boot_list[0] = BOOT_DEVICE_RAM;
@@ -468,7 +465,6 @@ void board_boot_order(u32 *spl_boot_list)
 
                return;
        }
-#endif
 
        /* Boot from SPI NOR with YMODEM UART fallback. */
        spl_boot_list[0] = BOOT_DEVICE_SPI;
index 3b79ac5e275d207546a47ff1fe35ce8820a57a22..1a922429af070e4f5d96a40721a29c62d4dd4a21 100644 (file)
@@ -1,42 +1,29 @@
 CONFIG_ARM=y
 CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
+# CONFIG_SPL_USE_ARCH_MEMCPY is not set
+# CONFIG_SPL_USE_ARCH_MEMSET is not set
 CONFIG_ARCH_RMOBILE=y
 CONFIG_SYS_TEXT_BASE=0x50000000
-CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_R8A7791=y
 CONFIG_TARGET_PORTER=y
-CONFIG_TPL_TEXT_BASE=0xe6300000
-CONFIG_TPL_MAX_SIZE=16384
 CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_DEFAULT_DEVICE_TREE="r8a7791-porter-u-boot"
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
 CONFIG_FIT=y
 CONFIG_BOOTDELAY=3
 CONFIG_VERSION_VARIABLE=y
 CONFIG_SPL_BOARD_INIT=y
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_TPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_TPL=y
-CONFIG_TPL_BOARD_INIT=y
-CONFIG_TPL_NEEDS_SEPARATE_TEXT_BASE=y
-CONFIG_TPL_RAM_SUPPORT=y
-CONFIG_TPL_RAM_DEVICE=y
-CONFIG_TPL_SERIAL_SUPPORT=y
-CONFIG_TPL_SPI_FLASH_SUPPORT=y
-CONFIG_TPL_SPI_LOAD=y
-CONFIG_TPL_SPI_SUPPORT=y
-CONFIG_TPL_YMODEM_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
@@ -59,14 +46,9 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
-CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_EMBED=y
-CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas power-domains"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
-CONFIG_SPL_OF_TRANSLATE=y
 CONFIG_CLK=y
-CONFIG_SPL_CLK=y
 CONFIG_CLK_RENESAS=y
 CONFIG_DM_GPIO=y
 CONFIG_RCAR_GPIO=y
@@ -85,12 +67,10 @@ CONFIG_DM_PCI=y
 CONFIG_PCI_RCAR_GEN2=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
-CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_PFC=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
-# CONFIG_TPL_DM_SERIAL is not set
 CONFIG_SCIF_CONSOLE=y
 CONFIG_SH_QSPI=y
 CONFIG_USB=y
index a839f55ed7a6f935273d3b5ef98d35d2f2e69cb6..c933fbf214358d71f28769cf81f628260581f923 100644 (file)
@@ -1,42 +1,29 @@
 CONFIG_ARM=y
 CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK=y
+# CONFIG_SPL_USE_ARCH_MEMCPY is not set
+# CONFIG_SPL_USE_ARCH_MEMSET is not set
 CONFIG_ARCH_RMOBILE=y
 CONFIG_SYS_TEXT_BASE=0x50000000
-CONFIG_SPL_GPIO_SUPPORT=y
 CONFIG_SPL_LIBCOMMON_SUPPORT=y
 CONFIG_SPL_LIBGENERIC_SUPPORT=y
 CONFIG_SYS_MALLOC_F_LEN=0x8000
 CONFIG_R8A7790=y
 CONFIG_TARGET_STOUT=y
-CONFIG_TPL_TEXT_BASE=0xe6300000
-CONFIG_TPL_MAX_SIZE=16384
 CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_TPL_LIBCOMMON_SUPPORT=y
-CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_SPL=y
 CONFIG_DEFAULT_DEVICE_TREE="r8a7790-stout-u-boot"
-CONFIG_TPL_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
 CONFIG_FIT=y
 CONFIG_BOOTDELAY=3
 CONFIG_VERSION_VARIABLE=y
 CONFIG_SPL_BOARD_INIT=y
 CONFIG_SPL_SYS_MALLOC_SIMPLE=y
-CONFIG_TPL_SYS_MALLOC_SIMPLE=y
-CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_RAM_SUPPORT=y
+CONFIG_SPL_RAM_DEVICE=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_TPL=y
-CONFIG_TPL_BOARD_INIT=y
-CONFIG_TPL_NEEDS_SEPARATE_TEXT_BASE=y
-CONFIG_TPL_RAM_SUPPORT=y
-CONFIG_TPL_RAM_DEVICE=y
-CONFIG_TPL_SERIAL_SUPPORT=y
-CONFIG_TPL_SPI_FLASH_SUPPORT=y
-CONFIG_TPL_SPI_LOAD=y
-CONFIG_TPL_SPI_SUPPORT=y
-CONFIG_TPL_YMODEM_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_IMI is not set
@@ -59,14 +46,9 @@ CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
-CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_EMBED=y
-CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dma-names dmas power-domains"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
-CONFIG_SPL_DM_SEQ_ALIAS=y
-CONFIG_SPL_OF_TRANSLATE=y
 CONFIG_CLK=y
-CONFIG_SPL_CLK=y
 CONFIG_CLK_RENESAS=y
 CONFIG_DM_GPIO=y
 CONFIG_RCAR_GPIO=y
@@ -85,12 +67,10 @@ CONFIG_DM_PCI=y
 CONFIG_PCI_RCAR_GEN2=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
-CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_PFC=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
-# CONFIG_TPL_DM_SERIAL is not set
 CONFIG_SCIF_CONSOLE=y
 CONFIG_SH_QSPI=y
 CONFIG_USB=y
index 7c46b55d8ffcc800983b2c2018d2493199293c09..b1a4c2576e961bb488611033ad2736aebd2833b1 100644 (file)
        "initrd_high=0xffffffff\0"
 
 /* SPL support */
-#define CONFIG_SPL_TEXT_BASE           0xe6304000
+#define CONFIG_SPL_TEXT_BASE           0xe6300000
 #define CONFIG_SPL_STACK               0xe6340000
-#define CONFIG_SPL_MAX_SIZE            0x40000
+#define CONFIG_SPL_MAX_SIZE            0x4000
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x140000
-
-/* TPL support */
-#ifdef CONFIG_TPL_BUILD
+#ifdef CONFIG_SPL_BUILD
 #define CONFIG_CONS_SCIF0
 #define CONFIG_SH_SCIF_CLK_FREQ                65000000
 #endif
index 226bea814001a6f19c4c339187c0d831f8d0fbbb..228cb552cb3fa0897ebbfd16648d344bcefd91ee 100644 (file)
        "initrd_high=0xffffffff\0"
 
 /* SPL support */
-#define CONFIG_SPL_TEXT_BASE           0xe6304000
+#define CONFIG_SPL_TEXT_BASE           0xe6300000
 #define CONFIG_SPL_STACK               0xe6340000
-#define CONFIG_SPL_MAX_SIZE            0x40000
+#define CONFIG_SPL_MAX_SIZE            0x4000
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x140000
-
-/* TPL support */
-#ifdef CONFIG_TPL_BUILD
+#ifdef CONFIG_SPL_BUILD
 #define CONFIG_CONS_SCIFA0
 #define CONFIG_SH_SCIF_CLK_FREQ                52000000
 #endif