at91sam9260/9263: add back up for the rst(reset controller).
authorSedji Gaouaou <sedji.gaouaou@atmel.com>
Wed, 24 Jun 2009 06:32:09 +0000 (08:32 +0200)
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Mon, 6 Jul 2009 19:50:09 +0000 (21:50 +0200)
On the boards at91sam9260ek, at91sam9263ek and afed9260, the rstc register was
set to 0 after being set to 500 ms for the PHY reset.
Do backup the old reset length and restore it after the MACB initialisation.

Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
Signed-off-by: Stelian Pop <stelian@popies.net>
board/afeb9260/afeb9260.c
board/atmel/at91sam9260ek/at91sam9260ek.c
board/atmel/at91sam9263ek/at91sam9263ek.c

index a247663bb4b0d404f3464d02a4b68d0c65e345d3..94a65c27a2f96cf299c719d5bacff414a656b63a 100644 (file)
@@ -81,6 +81,8 @@ static void afeb9260_nand_hw_init(void)
 #ifdef CONFIG_MACB
 static void afeb9260_macb_hw_init(void)
 {
+       unsigned long rstc;
+
        /* Enable clock */
        at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
 
@@ -103,6 +105,8 @@ static void afeb9260_macb_hw_init(void)
               pin_to_mask(AT91_PIN_PA28),
               pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
 
+       rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
+
        /* Need to reset PHY -> 500ms reset */
        at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
                                     AT91_RSTC_ERSTL | (0x0D << 8) |
@@ -115,7 +119,7 @@ static void afeb9260_macb_hw_init(void)
 
        /* Restore NRST value */
        at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
-                                    AT91_RSTC_ERSTL | (0x0 << 8) |
+                                    (rstc) |
                                     AT91_RSTC_URSTEN);
 
        /* Re-enable pull-up */
index 6bd3b44f063127b5e3fd059a6149c0fdc709b696..c10ad7253465938c2f3822f2a2f54c90c44cdf3e 100644 (file)
@@ -86,6 +86,8 @@ static void at91sam9260ek_nand_hw_init(void)
 #ifdef CONFIG_MACB
 static void at91sam9260ek_macb_hw_init(void)
 {
+       unsigned long rstc;
+
        /* Enable clock */
        at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
 
@@ -108,6 +110,8 @@ static void at91sam9260ek_macb_hw_init(void)
               pin_to_mask(AT91_PIN_PA28),
               pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
 
+       rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
+
        /* Need to reset PHY -> 500ms reset */
        at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
                                     (AT91_RSTC_ERSTL & (0x0D << 8)) |
@@ -120,7 +124,7 @@ static void at91sam9260ek_macb_hw_init(void)
 
        /* Restore NRST value */
        at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
-                                    (AT91_RSTC_ERSTL & (0x0 << 8)) |
+                                    (rstc) |
                                     AT91_RSTC_URSTEN);
 
        /* Re-enable pull-up */
index 660c47344547dd31694eda7439d4418bb43a0fdd..0b7065b715d5d896165a283107de1830ede8092f 100644 (file)
@@ -91,6 +91,8 @@ static void at91sam9263ek_nand_hw_init(void)
 #ifdef CONFIG_MACB
 static void at91sam9263ek_macb_hw_init(void)
 {
+       unsigned long rstc;
+
        /* Enable clock */
        at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC);
 
@@ -108,6 +110,8 @@ static void at91sam9263ek_macb_hw_init(void)
               pin_to_mask(AT91_PIN_PE26),
               pin_to_controller(AT91_PIN_PE0) + PIO_PUDR);
 
+       rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
+
        /* Need to reset PHY -> 500ms reset */
        at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
                                     (AT91_RSTC_ERSTL & (0x0D << 8)) |
@@ -120,7 +124,7 @@ static void at91sam9263ek_macb_hw_init(void)
 
        /* Restore NRST value */
        at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
-                                    (AT91_RSTC_ERSTL & (0x0 << 8)) |
+                                    (rstc) |
                                     AT91_RSTC_URSTEN);
 
        /* Re-enable pull-up */