ARM: atmel: sama5d4: add bus matrix init function
authorBo Shen <voice.shen@atmel.com>
Mon, 15 Dec 2014 05:24:34 +0000 (13:24 +0800)
committerAndreas Bießmann <andreas.devel@googlemail.com>
Sat, 7 Feb 2015 22:42:49 +0000 (23:42 +0100)
Signed-off-by: Bo Shen <voice.shen@atmel.com>
arch/arm/cpu/armv7/at91/sama5d4_devices.c

index 7469825565892e1df715c87c320c0738e030cce1..9c63e99899eadb7fcda46096a760290d4ed13022 100644 (file)
@@ -10,6 +10,7 @@
 #include <asm/arch/at91_common.h>
 #include <asm/arch/at91_pmc.h>
 #include <asm/arch/clk.h>
+#include <asm/arch/sama5_matrix.h>
 #include <asm/arch/sama5d4.h>
 
 char *get_cpu_name()
@@ -44,3 +45,37 @@ void at91_udp_hw_init(void)
        at91_periph_clk_enable(ATMEL_ID_UDPHS);
 }
 #endif
+
+#ifdef CONFIG_SPL_BUILD
+void matrix_init(void)
+{
+       struct atmel_matrix *h64mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX0;
+       struct atmel_matrix *h32mx = (struct atmel_matrix *)ATMEL_BASE_MATRIX1;
+       int i;
+
+       /* Disable the write protect */
+       writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);
+       writel(ATMEL_MATRIX_WPMR_WPKEY & ~ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr);
+
+       /* DDR port 1 ~ poart 7, slave number is: 4 ~ 10 */
+       for (i = 4; i <= 10; i++) {
+               writel(0x000f0f0f, &h64mx->ssr[i]);
+               writel(0x0000ffff, &h64mx->sassr[i]);
+               writel(0x0000000f, &h64mx->srtsr[i]);
+       }
+
+       /* CS3 */
+       writel(0x00c0c0c0, &h32mx->ssr[3]);
+       writel(0xff000000, &h32mx->sassr[3]);
+       writel(0xff000000, &h32mx->srtsr[3]);
+
+       /* NFC SRAM */
+       writel(0x00010101, &h32mx->ssr[4]);
+       writel(0x00000001, &h32mx->sassr[4]);
+       writel(0x00000001, &h32mx->srtsr[4]);
+
+       /* Enable the write protect */
+       writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h64mx->wpmr);
+       writel(ATMEL_MATRIX_WPMR_WPKEY | ATMEL_MATRIX_WPMR_WPEN, &h32mx->wpmr);
+}
+#endif