remove all references to .dynsym
authorAlbert ARIBAUD <albert.u.boot@aribaud.net>
Tue, 11 Jun 2013 12:17:31 +0000 (14:17 +0200)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Fri, 21 Jun 2013 21:04:05 +0000 (23:04 +0200)
Discard all .dynsym sections from linker scripts
Remove all __dynsym_start definitions from linker scripts
Remove all __dynsym_start references from the codebase

Note: this touches include/asm-generic/sections.h, which
is not ARM-specific, but actual uses of __dynsym_start
are only in ARM, so this patch can safely go through
the ARM repository.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Tested-by: Lubomir Popov <lpopov@mm-sol.com>
Tested-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
16 files changed:
arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds
arch/arm/cpu/ixp/u-boot.lds
arch/arm/cpu/u-boot-spl.lds
arch/arm/cpu/u-boot.lds
arch/arm/lib/relocate.S
board/actux1/u-boot.lds
board/actux2/u-boot.lds
board/actux3/u-boot.lds
board/ait/cam_enc_4xx/u-boot-spl.lds
board/davinci/da8xxevm/u-boot-spl-da850evm.lds
board/davinci/da8xxevm/u-boot-spl-hawk.lds
board/dvlhost/u-boot.lds
board/freescale/mx31ads/u-boot.lds
board/vpac270/u-boot-spl.lds
include/asm-generic/sections.h

index 673c725ab34e888255fff77a3549075394b9cefe..f4e7525f1e24b61fcaec7d2286b0f5625dc98a22 100644 (file)
@@ -57,11 +57,6 @@ SECTIONS
                __rel_dyn_end = .;
        }
 
-       .dynsym : {
-               __dynsym_start = .;
-               *(.dynsym)
-       }
-
        .bss : {
                . = ALIGN(4);
                __bss_start = .;
index 967a135b3b4843d32c7f19cea1fb6c4fe7c86a97..446d09501bc76ed442d36ff4a1406994faba9da6 100644 (file)
@@ -57,11 +57,6 @@ SECTIONS
                __rel_dyn_end = .;
        }
 
-       .dynsym : {
-               __dynsym_start = .;
-               *(.dynsym)
-       }
-
        .bss : {
                . = ALIGN(4);
                __bss_start = .;
index 553589ca6cbcdbcce06f804ac7507c1f906153d3..5cfff68e0501152b47eac219b9296eb5f5952425 100644 (file)
@@ -62,11 +62,6 @@ SECTIONS
                __rel_dyn_end = .;
        }
 
-       .dynsym : {
-               __dynsym_start = .;
-               *(.dynsym)
-       }
-
        _end = .;
 
 /*
@@ -88,6 +83,7 @@ SECTIONS
                KEEP(*(.__bss_end));
        }
 
+       /DISCARD/ : { *(.dynsym) }
        /DISCARD/ : { *(.dynstr*) }
        /DISCARD/ : { *(.dynamic*) }
        /DISCARD/ : { *(.plt*) }
index 1408f03b2343ccb2569a9e3a7b6ad1ddf77444a2..b6ed25f7d1b9d7dc49a581f6abac5fce0a4b387a 100644 (file)
@@ -58,11 +58,6 @@ SECTIONS
                __rel_dyn_end = .;
        }
 
-       .dynsym : {
-               __dynsym_start = .;
-               *(.dynsym)
-       }
-
        _end = .;
 
        .bss __rel_dyn_start (OVERLAY) : {
@@ -72,6 +67,7 @@ SECTIONS
                __bss_end = .;
        }
 
+       /DISCARD/ : { *(.dynsym) }
        /DISCARD/ : { *(.dynstr*) }
        /DISCARD/ : { *(.dynamic*) }
        /DISCARD/ : { *(.plt*) }
index d9bbee3b27dd39a903ef4e1092d50e4212747f71..fe2ca981769ac27f6ec3434bd5badfddd4d1416c 100644 (file)
@@ -65,11 +65,6 @@ SECTIONS
                __rel_dyn_end = .;
        }
 
-       .dynsym : {
-               __dynsym_start = .;
-               *(.dynsym)
-       }
-
        _end = .;
 
        /*
@@ -101,6 +96,7 @@ SECTIONS
                KEEP(*(.__bss_end));
        }
 
+       /DISCARD/ : { *(.dynsym) }
        /DISCARD/ : { *(.dynstr*) }
        /DISCARD/ : { *(.dynamic*) }
        /DISCARD/ : { *(.plt*) }
index 4446da94c55f01c5d66553dc300de05ff2a8896a..7a7c4c085e272fb6c7965aaf8b2638239967d22e 100644 (file)
@@ -56,8 +56,6 @@ copy_loop:
        /*
         * fix .rel.dyn relocations
         */
-       ldr     r10, _dynsym_start_ofs  /* r10 <- __dynsym_start local ofs */
-       add     r10, r10, r7            /* r10 <- SRC &__dynsym_start */
        ldr     r2, _rel_dyn_start_ofs  /* r2 <- __rel_dyn_start local ofs */
        add     r2, r2, r7              /* r2 <- SRC &__rel_dyn_start */
        ldr     r3, _rel_dyn_end_ofs    /* r3 <- __rel_dyn_end local ofs */
@@ -69,17 +67,8 @@ fixloop:
        and     r7, r1, #0xff
        cmp     r7, #23                 /* relative fixup? */
        beq     fixrel
-       cmp     r7, #2                  /* absolute fixup? */
-       beq     fixabs
        /* ignore unknown type of fixup */
        b       fixnext
-fixabs:
-       /* absolute fix: set location to (offset) symbol value */
-       mov     r1, r1, LSR #4          /* r1 <- symbol index in .dynsym */
-       add     r1, r10, r1             /* r1 <- address of symbol in table */
-       ldr     r1, [r1, #4]            /* r1 <- symbol value */
-       add     r1, r1, r9              /* r1 <- relocated sym addr */
-       b       fixnext
 fixrel:
        /* relative fix: increase location by offset */
        ldr     r1, [r0]
@@ -106,7 +95,5 @@ _rel_dyn_start_ofs:
        .word __rel_dyn_start - relocate_code
 _rel_dyn_end_ofs:
        .word __rel_dyn_end - relocate_code
-_dynsym_start_ofs:
-       .word __dynsym_start - relocate_code
 
 ENDPROC(relocate_code)
index ef4a25bc3cd952f163b91f6dd83079d4eb1e892a..989ad7121d19a519435b81ef0631ab4d1d21ade8 100644 (file)
@@ -70,11 +70,6 @@ SECTIONS
                __rel_dyn_end = .;
        }
 
-       .dynsym : {
-               __dynsym_start = .;
-               *(.dynsym)
-       }
-
        _end = .;
 
 /*
@@ -96,6 +91,7 @@ SECTIONS
                KEEP(*(.__bss_end));
        }
 
+       /DISCARD/ : { *(.dynsym) }
        /DISCARD/ : { *(.dynstr*) }
        /DISCARD/ : { *(.dynamic*) }
        /DISCARD/ : { *(.plt*) }
index 00ad8b71cd065bc466611c9dfc9d145511d61952..0e206704ff9a8ed66cf37d0d2889dd3448ff72f7 100644 (file)
@@ -70,11 +70,6 @@ SECTIONS
                __rel_dyn_end = .;
        }
 
-       .dynsym : {
-               __dynsym_start = .;
-               *(.dynsym)
-       }
-
        _end = .;
 
 /*
@@ -96,6 +91,7 @@ SECTIONS
                KEEP(*(.__bss_end));
        }
 
+       /DISCARD/ : { *(.dynsym) }
        /DISCARD/ : { *(.dynstr*) }
        /DISCARD/ : { *(.dynamic*) }
        /DISCARD/ : { *(.plt*) }
index 44b990ee7ff5cb548aba07923e08e1a3ef6e77b4..b7d29b4afa3d0e01c460fc32f576ee1ca9c63b33 100644 (file)
@@ -70,11 +70,6 @@ SECTIONS
                __rel_dyn_end = .;
        }
 
-       .dynsym : {
-               __dynsym_start = .;
-               *(.dynsym)
-       }
-
        _end = .;
 
 /*
@@ -96,6 +91,7 @@ SECTIONS
                KEEP(*(.__bss_end));
        }
 
+       /DISCARD/ : { *(.dynsym) }
        /DISCARD/ : { *(.dynstr*) }
        /DISCARD/ : { *(.dynamic*) }
        /DISCARD/ : { *(.plt*) }
index 1daa1b3b9090a8d9414bb4ba65cbc87fb83ea542..39726854cd5beeb7043e46de0f4b2d1e5013c2a0 100644 (file)
@@ -54,11 +54,6 @@ SECTIONS
                __rel_dyn_end = .;
        } >.sram
 
-       .dynsym : {
-               __dynsym_start = .;
-               *(.dynsym)
-       } >.sram
-
        .bss :
        {
                . = ALIGN(4);
index b1b8701811bf4324e77bfa15c46a8ee0be9e5010..6fa450909f5aae47ce3aab2e1964e9ee1904c609 100644 (file)
@@ -55,11 +55,6 @@ SECTIONS
                __rel_dyn_end = .;
        } >.sram
 
-       .dynsym : {
-               __dynsym_start = .;
-               *(.dynsym)
-       } >.sram
-
        .bss :
        {
                . = ALIGN(4);
index 596a9e08ea394ebeba09512a4501581b2901d9bf..b452f2078b5c80f3a1aaaf599cdc652b6481479d 100644 (file)
@@ -61,7 +61,6 @@ SECTIONS
        __image_copy_end = .;
        __rel_dyn_start = .;
        __rel_dyn_end = .;
-       __dynsym_start = .;
 
        __got_start = .;
        . = ALIGN(4);
index 6d4b1875c58adb56d3b39d08438a017a632124a5..ecd9efe8fc6de038953126d56c9054cf8364eda4 100644 (file)
@@ -70,11 +70,6 @@ SECTIONS
                __rel_dyn_end = .;
        }
 
-       .dynsym : {
-               __dynsym_start = .;
-               *(.dynsym)
-       }
-
        _end = .;
 
 /*
@@ -96,6 +91,7 @@ SECTIONS
                KEEP(*(.__bss_end));
        }
 
+       /DISCARD/ : { *(.dynsym) }
        /DISCARD/ : { *(.dynstr*) }
        /DISCARD/ : { *(.dynamic*) }
        /DISCARD/ : { *(.plt*) }
index 4969960001dda9af54bf772fa448c45250c61e1e..2197883140bbdc36fc21213590795e018d225c3e 100644 (file)
@@ -73,11 +73,6 @@ SECTIONS
                __rel_dyn_end = .;
        }
 
-       .dynsym : {
-               __dynsym_start = .;
-               *(.dynsym)
-       }
-
        _end = .;
 
 /*
@@ -100,6 +95,7 @@ SECTIONS
        }
 
        /DISCARD/ : { *(.bss*) }
+       /DISCARD/ : { *(.dynsym) }
        /DISCARD/ : { *(.dynstr*) }
        /DISCARD/ : { *(.dynsym*) }
        /DISCARD/ : { *(.dynamic*) }
index 61d1154aff6a598582fd7f024db3ae50567ce87c..1a3ef9285f6052772416ee72a140af587103a713 100644 (file)
@@ -67,11 +67,6 @@ SECTIONS
                __rel_dyn_end = .;
        }
 
-       .dynsym : {
-               __dynsym_start = .;
-               *(.dynsym)
-       }
-
        . = ALIGN(0x800);
 
        _end = .;
@@ -84,6 +79,7 @@ SECTIONS
        }
 
        /DISCARD/ : { *(.bss*) }
+       /DISCARD/ : { *(.dynsym) }
        /DISCARD/ : { *(.dynstr*) }
        /DISCARD/ : { *(.dynsym*) }
        /DISCARD/ : { *(.dynamic*) }
index 4b39844549f25fb0a164693c9a1639bfdd519146..3e32eee92c3d733d366f66bc41f6fc8583ffc6d6 100644 (file)
@@ -90,9 +90,6 @@ extern void _start(void);
 extern ulong _rel_dyn_start_ofs;
 extern ulong _rel_dyn_end_ofs;
 
-/* Start/end of the relocation symbol table, as an offset from _start */
-extern ulong _dynsym_start_ofs;
-
 /* End of the region to be relocated, as an offset form _start */
 extern ulong _image_copy_end_ofs;