# 0x00 ZM_MAIN_CTRL_OFFSET
* BIT7
* BIT6 - 1 = HighSpeed is set (read only?)
-* BIT5
-* BIT4
-* BIT3
+* BIT5 - chip enable
+* BIT4 - sfrst. soft reset?
+* BIT3 - go suspend
* BIT2 - 1 = enable global Int
* BIT1
* BIT0 - 1 = set Remote Wake Up;
# 0x22 ZM_INTR_SOURCE_1_OFFSET
# 0x23 ZM_INTR_SOURCE_2_OFFSET
+short packed interrupts?
+
# 0x24 ZM_INTR_SOURCE_3_OFFSET
# 0x25 ZM_INTR_SOURCE_4_OFFSET
* BIT7 - End of data.
* BIT6 - vUsb_Status_In()?
# 0x28 ZM_INTR_SOURCE_7_OFFSET
-* BIT7
-* BIT6
-* BIT5
-* BIT4
+* BIT7 - RX0BTYE_INT
+* BIT6 - TX0BTYE_INT
+* BIT5 - ISO seq abort
+* BIT4 - ISO seq error
* BIT3 - USB resume
* BIT2 - USB suspend
* BIT1 - USB reset interrupt.
# 0x2F mUsbEPMap EP0
code use: ZM_FUSB_BASE+0x30+(EPn-1)
(0x0F | FIFOn << 4) = OUT
-(0xF0 | FIFOn) = IN
+(0xF0 | FIFOn) = IN
+**probably incorrect interpretation. It should be FUSB_REG_IDLE_CNT
+ set suspend delay in ms**
for FIFOn see mUsbFIFOMap registers.