int i,boot;
unsigned long pvr;
char buf[64];
- char tmp[16];
+ char buf1[32], buf2[32], buf3[32], buf4[32];
char cpustr[16];
char *s, *e, bc;
switch (line_number)
}
buf[i++]=0;
}
- sprintf (info," %s %s %s MHz (%lu/%lu/%lu MHz)",
+ sprintf (info," %s %s %s MHz (%s/%s/%s MHz)",
buf, cpustr,
- strmhz (tmp, gd->cpu_clk), sys_info.freqPLB / 1000000,
- sys_info.freqPLB / sys_info.pllOpbDiv / 1000000,
- sys_info.freqPLB / sys_info.pllExtBusDiv / 1000000);
+ strmhz (buf1, gd->cpu_clk),
+ strmhz (buf2, sys_info.freqPLB),
+ strmhz (buf3, sys_info.freqPLB / sys_info.pllOpbDiv),
+ strmhz (buf4, sys_info.freqPLB / sys_info.pllExtBusDiv));
return;
case 3:
/* Memory Info */
int checkboard (void)
{
sys_info_t sysinfo;
+ char buf[32];
get_sys_info (&sysinfo);
#else
printf ("Board: Wind River SBC8540 Board\n");
#endif
- printf ("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000);
- printf ("\tCCB: %lu MHz\n", sysinfo.freqSystemBus / 1000000);
- printf ("\tDDR: %lu MHz\n", sysinfo.freqSystemBus / 2000000);
+ printf ("\tCPU: %s MHz\n", strmhz(buf, sysinfo.freqProcessor));
+ printf ("\tCCB: %s MHz\n", strmhz(buf, sysinfo.freqSystemBus));
+ printf ("\tDDR: %s MHz\n", strmhz(buf, sysinfo.freqSystemBus/2));
if((CONFIG_SYS_LBC_LCRR & 0x0f) == 2 || (CONFIG_SYS_LBC_LCRR & 0x0f) == 4 \
|| (CONFIG_SYS_LBC_LCRR & 0x0f) == 8) {
- printf ("\tLBC: %lu MHz\n", sysinfo.freqSystemBus / 1000000 /(CONFIG_SYS_LBC_LCRR & 0x0f));
+ printf ("\tLBC: %s MHz\n",
+ strmhz(buf, sysinfo.freqSystemBus/(CONFIG_SYS_LBC_LCRR & 0x0f)));
} else {
printf("\tLBC: unknown\n");
}
- printf("\tCPM: %lu Mhz\n", sysinfo.freqSystemBus / 1000000);
+ printf("\tCPM: %s MHz\n", strmhz(buf, sysinfo.freqSystemBus));
printf("L1 D-cache 32KB, L1 I-cache 32KB enabled.\n");
return (0);
}
}
if (id) {
+ char buf1[32], buf2[32], buf3[32];
+
printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
ver);
- printf(" CPU CLK %d Mhz BUS CLK %d Mhz FLB CLK %d Mhz\n",
- (int)(gd->cpu_clk / 1000000),
- (int)(gd->bus_clk / 1000000),
- (int)(gd->flb_clk / 1000000));
- printf(" INP CLK %d Mhz VCO CLK %d Mhz\n",
- (int)(gd->inp_clk / 1000000),
- (int)(gd->vco_clk / 1000000));
+ printf(" CPU CLK %s MHz BUS CLK %s MHz FLB CLK %s MHz\n",
+ strmhz(buf1, gd->cpu_clk)),
+ strmhz(buf2, gd->bus_clk)),
+ strmhz(buf3, gd->flb_clk)));
+ printf(" INP CLK %s MHz VCO CLK %s MHz\n",
+ strmhz(buf1, gd->inp_clk)),
+ strmhz(buf2, gd->vco_clk)));
}
return 0;
}
if (id) {
+ char buf1[32], buf2[32];
+
printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
ver);
- printf(" CPU CLK %d Mhz BUS CLK %d Mhz\n",
- (int)(gd->cpu_clk / 1000000),
- (int)(gd->bus_clk / 1000000));
+ printf(" CPU CLK %s MHz BUS CLK %s MHz\n",
+ strmhz(buf1, gd->cpu_clk)),
+ strmhz(buf2, gd->bus_clk)));
}
return 0;
}
if (id) {
+ char buf1[32], buf2[32];
+
printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
ver);
- printf(" CPU CLK %d Mhz BUS CLK %d Mhz\n",
- (int)(gd->cpu_clk / 1000000),
- (int)(gd->bus_clk / 1000000));
+ printf(" CPU CLK %s MHz BUS CLK %s MHz\n",
+ strmhz(buf1, gd->cpu_clk)),
+ strmhz(buf2, gd->bus_clk)));
}
return 0;
}
if (id) {
+ char buf1[32], buf2[32], buf3[32];
+
printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
ver);
- printf(" CPU CLK %d Mhz BUS CLK %d Mhz FLB CLK %d Mhz\n",
- (int)(gd->cpu_clk / 1000000),
- (int)(gd->bus_clk / 1000000),
- (int)(gd->flb_clk / 1000000));
+ printf(" CPU CLK %s MHz BUS CLK %s MHz FLB CLK %s MHz\n",
+ strmhz(buf1, gd->cpu_clk),
+ strmhz(buf2, gd->bus_clk),
+ strmhz(buf3, gd->flb_clk));
#ifdef CONFIG_PCI
- printf(" PCI CLK %d Mhz INP CLK %d Mhz VCO CLK %d Mhz\n",
- (int)(gd->pci_clk / 1000000),
- (int)(gd->inp_clk / 1000000),
- (int)(gd->vco_clk / 1000000));
+ printf(" PCI CLK %s MHz INP CLK %s MHz VCO CLK %s MHz\n",
+ strmhz(buf1, gd->pci_clk),
+ strmhz(buf2, gd->inp_clk),
+ strmhz(buf3, gd->vco_clk));
#else
- printf(" INP CLK %d Mhz VCO CLK %d Mhz\n",
- (int)(gd->inp_clk / 1000000),
- (int)(gd->vco_clk / 1000000));
+ printf(" INP CLK %s MHz VCO CLK %s MHz\n",
+ strmhz(buf1, gd->inp_clk),
+ strmhz(buf2, gd->vco_clk));
#endif
}
}
if (id) {
+ char buf1[32], buf2[32];
+
printf("Freescale MCF%d\n", id);
- printf(" CPU CLK %d Mhz BUS CLK %d Mhz\n",
- (int)(gd->cpu_clk / 1000000),
- (int)(gd->bus_clk / 1000000));
+ printf(" CPU CLK %s MHz BUS CLK %s MHz\n",
+ strmhz(buf1, gd->cpu_clk),
+ strmhz(buf2, gd->bus_clk));
}
return 0;
ulong clock = gd->cpu_clk;
u32 pvr = get_pvr ();
u32 spridr = immr->sysconf.spridr;
- char buf[32];
+ char buf1[32], buf2[32];
puts ("CPU: ");
default:
puts ("unknown ");
}
- printf ("at %s MHz, CSB at %3d MHz\n", strmhz(buf, clock),
- gd->csb_clk / 1000000);
+ printf ("at %s MHz, CSB at %s MHz\n",
+ strmhz(buf1, clock),
+ strmhz(buf2, gd->csb_clk) );
return 0;
}
int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
+ char buf[32];
+
printf("Clock configuration:\n");
- printf(" CPU: %4ld MHz\n", gd->cpu_clk / 1000000);
- printf(" Coherent System Bus: %4d MHz\n", gd->csb_clk / 1000000);
- printf(" IPS Bus: %4d MHz\n", gd->ips_clk / 1000000);
- printf(" PCI: %4d MHz\n", gd->pci_clk / 1000000);
- printf(" DDR: %4d MHz\n", 2 * gd->csb_clk / 1000000);
+ printf(" CPU: %-4s MHz\n", strmhz(buf, gd->cpu_clk));
+ printf(" Coherent System Bus: %-4s MHz\n", strmhz(buf, gd->csb_clk));
+ printf(" IPS Bus: %-4s MHz\n", strmhz(buf, gd->ips_clk));
+ printf(" PCI: %-4s MHz\n", strmhz(buf, gd->pci_clk));
+ printf(" DDR: %-4s MHz\n", strmhz(buf, 2*gd->csb_clk));
return 0;
}
int prt_mpc5xxx_clks (void)
{
- printf(" Bus %ld MHz, IPB %ld MHz, PCI %ld MHz\n",
- gd->bus_clk / 1000000, gd->ipb_clk / 1000000,
- gd->pci_clk / 1000000);
+ char buf1[32], buf2[32], buf3[32];
+ printf (" Bus %s MHz, IPB %s MHz, PCI %s MHz\n",
+ strmhz(buf1, gd->bus_clk),
+ strmhz(buf2, gd->ipb_clk),
+ strmhz(buf3, gd->pci_clk)
+ );
return (0);
}
int prt_mpc8220_clks (void)
{
- printf (" Bus %ld MHz, CPU %ld MHz, PCI %ld MHz, VCO %ld MHz\n",
- gd->bus_clk / 1000000, gd->cpu_clk / 1000000,
- gd->pci_clk / 1000000, gd->vco_clk / 1000000);
-
+ char buf1[32], buf2[32], buf3[32], buf4[32];
+
+ printf (" Bus %s MHz, CPU %s MHz, PCI %s MHz, VCO %s MHz\n",
+ strmhz(buf1, gd->bus_clk),
+ strmhz(buf2, gd->cpu_clk),
+ strmhz(buf3, gd->pci_clk),
+ strmhz(buf4, gd->vco_clk)
+ );
return (0);
}
int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
+ char buf[32];
+
printf("Clock configuration:\n");
- printf(" Core: %4d MHz\n", gd->core_clk / 1000000);
- printf(" Coherent System Bus: %4d MHz\n", gd->csb_clk / 1000000);
+ printf(" Core: %-4s MHz\n", strmhz(buf, gd->core_clk));
+ printf(" Coherent System Bus: %-4s MHz\n", strmhz(buf, gd->csb_clk));
#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832X)
- printf(" QE: %4d MHz\n", gd->qe_clk / 1000000);
- printf(" BRG: %4d MHz\n", gd->brg_clk / 1000000);
+ printf(" QE: %-4s MHz\n", strmhz(buf, gd->qe_clk));
+ printf(" BRG: %-4s MHz\n", strmhz(buf, gd->brg_clk));
#endif
- printf(" Local Bus Controller:%4d MHz\n", gd->lbiu_clk / 1000000);
- printf(" Local Bus: %4d MHz\n", gd->lclk_clk / 1000000);
- printf(" DDR: %4ld MHz\n", gd->mem_clk / 1000000);
+ printf(" Local Bus Controller:%-4s MHz\n", strmhz(buf, gd->lbiu_clk));
+ printf(" Local Bus: %-4s MHz\n", strmhz(buf, gd->lclk_clk));
+ printf(" DDR: %-4s MHz\n", strmhz(buf, gd->mem_clk));
#if defined(CONFIG_MPC8360)
- printf(" DDR Secondary: %4d MHz\n", gd->mem_sec_clk / 1000000);
+ printf(" DDR Secondary: %-4s MHz\n", strmhz(buf, gd->mem_sec_clk));
#endif
- printf(" SEC: %4d MHz\n", gd->enc_clk / 1000000);
- printf(" I2C1: %4d MHz\n", gd->i2c1_clk / 1000000);
+ printf(" SEC: %-4s MHz\n", strmhz(buf, gd->enc_clk));
+ printf(" I2C1: %-4s MHz\n", strmhz(buf, gd->i2c1_clk));
#if !defined(CONFIG_MPC832X)
- printf(" I2C2: %4d MHz\n", gd->i2c2_clk / 1000000);
+ printf(" I2C2: %-4s MHz\n", strmhz(buf, gd->i2c2_clk));
#endif
#if defined(CONFIG_MPC8315)
- printf(" TDM: %4d MHz\n", gd->tdm_clk / 1000000);
+ printf(" TDM: %-4s MHz\n", strmhz(buf, gd->tdm_clk));
#endif
#if defined(CONFIG_MPC837X)
- printf(" SDHC: %4d MHz\n", gd->sdhc_clk / 1000000);
+ printf(" SDHC: %-4s MHz\n", strmhz(buf, gd->sdhc_clk));
#endif
#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X) || defined(CONFIG_MPC837X)
- printf(" TSEC1: %4d MHz\n", gd->tsec1_clk / 1000000);
- printf(" TSEC2: %4d MHz\n", gd->tsec2_clk / 1000000);
- printf(" USB DR: %4d MHz\n", gd->usbdr_clk / 1000000);
+ printf(" TSEC1: %-4s MHz\n", strmhz(buf, gd->tsec1_clk));
+ printf(" TSEC2: %-4s MHz\n", strmhz(buf, gd->tsec2_clk));
+ printf(" USB DR: %-4s MHz\n", strmhz(buf, gd->usbdr_clk));
#endif
#if defined(CONFIG_MPC834X)
- printf(" USB MPH: %4d MHz\n", gd->usbmph_clk / 1000000);
+ printf(" USB MPH: %-4s MHz\n", strmhz(buf, gd->usbmph_clk));
#endif
#if defined(CONFIG_MPC837X)
- printf(" PCIEXP1: %4d MHz\n", gd->pciexp1_clk / 1000000);
- printf(" PCIEXP2: %4d MHz\n", gd->pciexp2_clk / 1000000);
+ printf(" PCIEXP1: %-4s MHz\n", strmhz(buf, gd->pciexp1_clk));
+ printf(" PCIEXP2: %-4s MHz\n", strmhz(buf, gd->pciexp2_clk));
#endif
#if defined(CONFIG_MPC837X) || defined(CONFIG_MPC8315)
- printf(" SATA: %4d MHz\n", gd->sata_clk / 1000000);
+ printf(" SATA: %-4s MHz\n", strmhz(buf, gd->sata_clk));
#endif
return 0;
}
uint ver;
uint major, minor;
struct cpu_type *cpu;
+ char buf1[32], buf2[32];
#ifdef CONFIG_DDR_CLK_FREQ
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO)
get_sys_info(&sysinfo);
puts("Clock Configuration:\n");
- printf(" CPU:%4lu MHz, ", DIV_ROUND_UP(sysinfo.freqProcessor,1000000));
- printf("CCB:%4lu MHz,\n", DIV_ROUND_UP(sysinfo.freqSystemBus,1000000));
+ printf(" CPU:%-4s MHz, ", strmhz(buf1, sysinfo.freqProcessor));
+ printf("CCB:%-4s MHz,\n", strmhz(buf1, sysinfo.freqSystemBus));
switch (ddr_ratio) {
case 0x0:
- printf(" DDR:%4lu MHz (%lu MT/s data rate), ",
- DIV_ROUND_UP(sysinfo.freqDDRBus,2000000), DIV_ROUND_UP(sysinfo.freqDDRBus,1000000));
+ printf(" DDR:%-4s MHz (%s MT/s data rate), ",
+ strmhz(buf1, sysinfo.freqDDRBus/2),
+ strmhz(buf2, sysinfo.freqDDRBus));
break;
case 0x7:
- printf(" DDR:%4lu MHz (%lu MT/s data rate) (Synchronous), ",
- DIV_ROUND_UP(sysinfo.freqDDRBus, 2000000), DIV_ROUND_UP(sysinfo.freqDDRBus, 1000000));
+ printf(" DDR:%-4s MHz (%s MT/s data rate) (Synchronous), ",
+ strmhz(buf1, sysinfo.freqDDRBus/2),
+ strmhz(buf2, sysinfo.freqDDRBus));
break;
default:
- printf(" DDR:%4lu MHz (%lu MT/s data rate) (Asynchronous), ",
- DIV_ROUND_UP(sysinfo.freqDDRBus, 2000000), DIV_ROUND_UP(sysinfo.freqDDRBus,1000000));
+ printf(" DDR:%-4s MHz (%s MT/s data rate) (Asynchronous), ",
+ strmhz(buf1, sysinfo.freqDDRBus/2),
+ strmhz(buf2, sysinfo.freqDDRBus));
break;
}
*/
clkdiv *= 2;
#endif
- printf("LBC:%4lu MHz\n",
- DIV_ROUND_UP(sysinfo.freqSystemBus, 1000000) / clkdiv);
+ printf("LBC:%-4s MHz\n",
+ strmhz(buf1, sysinfo.freqSystemBus / clkdiv));
} else {
printf("LBC: unknown (lcrr: 0x%08x)\n", lcrr);
}
#ifdef CONFIG_CPM2
- printf("CPM: %lu Mhz\n", sysinfo.freqSystemBus / 1000000);
+ printf("CPM: %s MHz\n", strmhz(buf1, sysinfo.freqSystemBus));
#endif
puts("L1: D-cache 32 kB enabled\n I-cache 32 kB enabled\n");
projects / oweals / u-boot.git / commitdiff