EXYNOS5: FDT: Add DWMMC device node data
authorAmar <amarendra.xt@samsung.com>
Sat, 27 Apr 2013 06:12:53 +0000 (11:42 +0530)
committerMinkyu Kang <mk7.kang@samsung.com>
Thu, 13 Jun 2013 08:35:13 +0000 (17:35 +0900)
This patch adds DWMMC device node data for exynos5.
This patch also adds binding file for DWMMC device node.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Amar <amarendra.xt@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
arch/arm/dts/exynos5250.dtsi
board/samsung/dts/exynos5250-smdk5250.dts
doc/device-tree-bindings/exynos/dwmmc.txt [new file with mode: 0644]

index df4b231cf3a434c12be80f696db5eb7a8137318d..cee4fe82cd6e5a441288ba55c55b6424430696e6 100644 (file)
                #address-cells = <1>;
                #size-cells = <1>;
        };
+
+       mmc@12200000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "samsung,exynos5250-dwmmc";
+               reg = <0x12200000 0x1000>;
+               interrupts = <0 75 0>;
+       };
+
+       mmc@12210000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "samsung,exynos5250-dwmmc";
+               reg = <0x12210000 0x1000>;
+               interrupts = <0 76 0>;
+       };
+
+       mmc@12220000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "samsung,exynos5250-dwmmc";
+               reg = <0x12220000 0x1000>;
+               interrupts = <0 77 0>;
+       };
+
+       mmc@12230000 {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "samsung,exynos5250-dwmmc";
+               reg = <0x12230000 0x1000>;
+               interrupts = <0 78 0>;
+       };
+
 };
index 8da973b30522b80086984b733ffe585bfa772751..93375a64b2f3fa43d063fcd20582fe2db6e9215f 100644 (file)
                spi2 = "/spi@12d40000";
                spi3 = "/spi@131a0000";
                spi4 = "/spi@131b0000";
+               mmc0 = "/mmc@12200000";
+               mmc1 = "/mmc@12210000";
+               mmc2 = "/mmc@12220000";
+               mmc3 = "/mmc@12230000";
        };
 
        sromc@12250000 {
                samsung,ycbcr-coeff = <0>;
                samsung,color-depth = <1>;
        };
+
+       mmc@12200000 {
+               samsung,bus-width = <8>;
+               samsung,timing = <1 3 3>;
+               samsung,removable = <0>;
+       };
+
+       mmc@12210000 {
+               status = "disabled";
+       };
+
+       mmc@12220000 {
+               samsung,bus-width = <4>;
+               samsung,timing = <1 2 3>;
+               samsung,removable = <1>;
+       };
+
+       mmc@12230000 {
+               status = "disabled";
+       };
 };
diff --git a/doc/device-tree-bindings/exynos/dwmmc.txt b/doc/device-tree-bindings/exynos/dwmmc.txt
new file mode 100644 (file)
index 0000000..566da3b
--- /dev/null
@@ -0,0 +1,54 @@
+* Exynos 5250 DWC_mobile_storage
+
+The Exynos 5250 provides DWC_mobile_storage interface which supports
+. Embedded Multimedia Cards (EMMC-version 4.5)
+. Secure Digital memory (SD mem-version 2.0)
+. Secure Digital I/O (SDIO-version 3.0)
+. Consumer Electronics Advanced Transport Architecture (CE-ATA-version 1.1)
+
+The Exynos 5250 DWC_mobile_storage provides four channels.
+SOC specific and Board specific properties are channel specific.
+
+Required SoC Specific Properties:
+
+- compatible: should be
+       - samsung,exynos5250-dwmmc: for exynos5250 platforms
+
+- reg: physical base address of the controller and length of memory mapped
+       region.
+
+- interrupts: The interrupt number to the cpu.
+
+Required Board Specific Properties:
+
+- #address-cells: should be 1.
+- #size-cells: should be 0.
+- samsung,bus-width: The width of the bus used to interface the devices
+       supported by DWC_mobile_storage (SD-MMC/EMMC/SDIO).
+       . Typically the bus width is 4 or 8.
+- samsung,timing: The timing values to be written into the
+       Drv/sample clock selection register of corresponding channel.
+       . It is comprised of 3 values corresponding to the 3 fileds
+         'SelClk_sample', 'SelClk_drv' and 'DIVRATIO' of CLKSEL register.
+       . SelClk_sample: Select sample clock among 8 shifted clocks.
+       . SelClk_drv: Select drv clock among 8 shifted clocks.
+       . DIVRATIO: Clock Divide ratio select.
+       . The above 3 values are used by the clock phase shifter.
+
+Example:
+
+mmc@12200000 {
+       samsung,bus-width = <8>;
+       samsung,timing = <1 3 3>;
+       samsung,removable = <1>;
+}
+In the above example,
+       . The bus width is 8
+       . Timing is comprised of 3 values as explained below
+               1 - SelClk_sample
+               3 - SelClk_drv
+               3 - DIVRATIO
+       . The 'removable' flag indicates whether the the particilar device
+         cannot be removed (always present) or it is a removable device.
+               1 - Indicates that the device is removable.
+               0 - Indicates that the device cannot be removed.