#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo(void)
{
- char *rev;
+ char *rev = "??";
u16 devid = (readl(KW_REG_PCIE_DEVID) >> 16) & 0xffff;
u8 revid = readl(KW_REG_PCIE_REVID) & 0xff;
switch (revid) {
case 0:
- rev = "Z0";
+ if (devid == 0x6281)
+ rev = "Z0";
+ else if (devid == 0x6282)
+ rev = "A0";
+ break;
+ case 1:
+ rev = "A1";
break;
case 2:
rev = "A0";
rev = "A1";
break;
default:
- rev = "??";
break;
}
# Configure RGMII-0 interface pad voltage to 1.8V
DATA 0xffd100e0 0x1b1b1b9b
-#Dram initalization for SINGLE x16 CL=5 @ 400MHz
+# Dram initalization for SINGLE x16 CL=5 @ 400MHz
DATA 0xffd01400 0x43000c30 # DDR Configuration register
# bit13-0: 0xc30, (3120 DDR2 clks refresh rate)
# bit23-14: 0x0,
# bit6-4: 0x4, CL=5
# bit7: 0x0, TestMode=0 normal
# bit8: 0x0, DLL reset=0 normal
-# bit11-9: 0x6, auto-precharge write recovery ????????????
+# bit11-9: 0x6, auto-precharge write recovery
# bit12: 0x0, PD must be zero
# bit31-13: 0x0, required
#
# Boot Media configurations
-BOOT_FROM nand # change from nand to uart if building UART image
+BOOT_FROM nand
NAND_ECC_MODE default
NAND_PAGE_SIZE 0x0800
# Configure RGMII-0 interface pad voltage to 1.8V
DATA 0xffd100e0 0x1b1b1b9b
-#Dram initalization for SINGLE x16 CL=5 @ 400MHz
+# Dram initalization for SINGLE x16 CL=5 @ 400MHz
DATA 0xffd01400 0x43000c30 # DDR Configuration register
# bit13-0: 0xc30, (3120 DDR2 clks refresh rate)
# bit23-14: 0x0,
-# bit24: 0x1, enable exit self refresh mode on DDR access
-# bit25: 0x1, required
+# bit24: 0x1, enable exit self refresh mode on DDR access
+# bit25: 0x1, required
# bit29-26: 0x0,
# bit31-30: 0x1,
# bit3-2: 11, Cs0size (1Gb)
# bit5-4: 00, Cs1width (x8)
# bit7-6: 11, Cs1size (1Gb)
-# bit9-8: 00, Cs2width (nonexistent
-# bit11-10: 00, Cs2size (nonexistent
-# bit13-12: 00, Cs3width (nonexistent
-# bit15-14: 00, Cs3size (nonexistent
+# bit9-8: 00, Cs2width (nonexistent)
+# bit11-10: 00, Cs2size (nonexistent)
+# bit13-12: 00, Cs3width (nonexistent)
+# bit15-14: 00, Cs3size (nonexistent)
# bit16: 0, Cs0AddrSel
# bit17: 0, Cs1AddrSel
# bit18: 0, Cs2AddrSel
# bit6-4: 0x4, CL=5
# bit7: 0x0, TestMode=0 normal
# bit8: 0x0, DLL reset=0 normal
-# bit11-9: 0x6, auto-precharge write recovery ????????????
+# bit11-9: 0x6, auto-precharge write recovery
# bit12: 0x0, PD must be zero
# bit31-13: 0x0, required
DATA 0xffd01480 0x00000001 # DDR Initialization Control
# bit0: 0x1, enable DDR init upon this register write
-DATA 0xFFD20134 0x66666666 # L2 RAM Timing 0 Register
-DATA 0xFFD20138 0x66666666 # L2 RAM Timing 1 Register
+DATA 0xffd20134 0x66666666 # L2 RAM Timing 0 Register
+DATA 0xffd20138 0x66666666 # L2 RAM Timing 1 Register
# End of Header extension
DATA 0x0 0x0
DECLARE_GLOBAL_DATA_PTR;
+#ifndef CONFIG_MVGBE_PORTS
+# define CONFIG_MVGBE_PORTS {0, 0}
+#endif
+
#define MV_PHY_ADR_REQUEST 0xee
#define MVGBE_SMI_REG (((struct mvgbe_registers *)MVGBE0_BASE)->smi)
#ifndef _CONFIG_DOCKSTAR_H
#define _CONFIG_DOCKSTAR_H
+#define CONFIG_SYS_GENERIC_BOARD
+
/*
* Version number information
*/
#ifndef _CONFIG_GOFLEXHOME_H
#define _CONFIG_GOFLEXHOME_H
+#define CONFIG_SYS_GENERIC_BOARD
+
/*
* Version number information
*/
/*
- * (C) Copyright 2009
+ * (C) Copyright 2009-2014
+ * Gerald Kerma <dreagle@doukki.net>
* Marvell Semiconductor <www.marvell.com>
* Written-by: Siddarth Gore <gores@marvell.com>
*
#ifndef _CONFIG_GURUPLUG_H
#define _CONFIG_GURUPLUG_H
+#define CONFIG_SYS_GENERIC_BOARD
+
/*
* Version number information
*/
#define CONFIG_MACH_GURUPLUG /* Machine type */
#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
+/*
+ * Compression configuration
+ */
+#define CONFIG_BZIP2
+#define CONFIG_LZMA
+#define CONFIG_LZO
+
+/*
+ * Enable device tree support
+ */
+#define CONFIG_OF_LIBFDT
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
+
/*
* Commands configuration
*/
#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
#include <config_cmd_default.h>
+#define CONFIG_CMD_BOOTZ
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_ENV
-#define CONFIG_CMD_FAT
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_MII
#define CONFIG_CMD_NAND
#define CONFIG_CMD_PING
#define CONFIG_CMD_USB
-#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FAT
/*
* mv-common.h should be defined after CMD configs since it used them
* it has to be rounded to sector size
*/
#define CONFIG_ENV_SIZE 0x20000 /* 128k */
-#define CONFIG_ENV_ADDR 0x60000
-#define CONFIG_ENV_OFFSET 0x60000 /* env starts here */
+#define CONFIG_ENV_OFFSET 0xE0000 /* env starts here */
/*
* Default environment variables
*/
-#define CONFIG_BOOTCOMMAND "setenv ethact egiga0; " \
- "${x_bootcmd_ethernet}; setenv ethact egiga1; " \
- "${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; "\
- "setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \
- "bootm 0x6400000;"
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "x_bootcmd_ethernet=ping 192.168.2.1\0" \
- "x_bootcmd_usb=usb start\0" \
- "x_bootcmd_kernel=nand read.e 0x6400000 0x100000 0x400000\0" \
- "x_bootargs=console=ttyS0,115200\0" \
- "x_bootargs_root=ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs\0"
+#define CONFIG_BOOTCOMMAND \
+ "setenv bootargs ${console} ${mtdparts} ${bootargs_root}; " \
+ "ubi part root; " \
+ "ubifsmount ubi:rootfs; " \
+ "ubifsload 0x800000 ${kernel}; " \
+ "ubifsload 0x700000 ${fdt}; " \
+ "ubifsumount; " \
+ "fdt addr 0x700000; fdt resize; fdt chosen; " \
+ "bootz 0x800000 - 0x700000"
+
+#define CONFIG_MTDPARTS \
+ "mtdparts=orion_nand:" \
+ "896K(uboot),128K(uboot_env)," \
+ "-@1M(root)\0"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "console=console=ttyS0,115200\0" \
+ "mtdids=nand0=orion_nand\0" \
+ "mtdparts="CONFIG_MTDPARTS \
+ "kernel=/boot/zImage\0" \
+ "fdt=/boot/guruplug-server-plus.dtb\0" \
+ "bootargs_root=ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs rw\0"
+
+#define MTDIDS_DEFAULT "nand0=orion_nand"
+
+#define MTDPARTS_DEFAULT \
+ "mtdparts="CONFIG_MTDPARTS
/*
* Ethernet Driver configuration
#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET
#endif /*CONFIG_MVSATA_IDE*/
+/*
+ * File system
+ */
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_UBI
+#define CONFIG_CMD_UBIFS
+#define CONFIG_RBTREE
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_CMD_MTDPARTS
+
#define CONFIG_SYS_ALT_MEMTEST
#endif /* _CONFIG_GURUPLUG_H */
#ifndef _CONFIG_IB62x0_H
#define _CONFIG_IB62x0_H
+#define CONFIG_SYS_GENERIC_BOARD
+
/*
* Version number information
*/
#ifndef _CONFIG_ICONNECT_H
#define _CONFIG_ICONNECT_H
+#define CONFIG_SYS_GENERIC_BOARD
+
/*
* Version number information
*/
#ifndef _CONFIG_POGO_E02_H
#define _CONFIG_POGO_E02_H
+#define CONFIG_SYS_GENERIC_BOARD
+
/*
* Machine type definition and ID
*/
#ifndef _CONFIG_SHEEVAPLUG_H
#define _CONFIG_SHEEVAPLUG_H
+#define CONFIG_SYS_GENERIC_BOARD
+
/*
* Version number information
*/