* Cleaned up the TSR[WIS] clearing
* Cleaned up DMA initialization
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
* Clear TSR(WIS) bit by writing 1
*/
unsigned long val;
- val = mfspr(tsr);
- val |= 0x40000000;
- mtspr(tsr, val);
+ val = mfspr(SPRN_TSR);
+ val |= TSR_WIS;
+ mtspr(SPRN_TSR, val);
}
#endif /* CONFIG_WATCHDOG */
dma->satr0 = 0x02c40000;
dma->datr0 = 0x02c40000;
+ dma->sr0 = 0xfffffff; /* clear any errors */
asm("sync; isync; msync");
return;
}
status = dma->sr0;
}
+ /* clear MR0[CS] channel start bit */
+ dma->mr0 &= 0x00000001;
+ asm("sync;isync;msync");
+
if (status != 0) {
printf ("DMA Error: status = %x\n", status);
}