Fix a HW timing issue on 8548 CDS for eTSEC 3 in RGMII mode

Patch by Andy Fleming, 14 Jun 2005

diff --git a/CHANGELOG b/CHANGELOG
index 272463280b7e03b48a74b1c9f075fb3e37774234..bdd6fc62f7945bc45c8412b7e654f45df820b1ab 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,9 @@
 Changes since U-Boot 1.1.4:
 ======================================================================
 
+* Fix a HW timing issue on 8548 CDS for eTSEC 3 in RGMII mode
+  Patch by Andy Fleming, 14 Jun 2005
+
 * Fix bad register definitions for LTX971 PHY on MPC85xx boards.
   Patch by Gerhard Jaeger, 21 Jun 2005
 

diff --git a/drivers/tsec.h b/drivers/tsec.h
index e3bbff03bf9badb09ea9a5a7f15e66fc636d2de6..e92b53ad6b81629bb7d5476c2a6d090e8fb2aa07 100644 (file)
--- a/drivers/tsec.h
+++ b/drivers/tsec.h
@@ -124,7 +124,7 @@
 /* Cicada 8204 Extended PHY Control Register 1 */
 #define MIIM_CIS8204_EPHY_CON          0x17
 #define MIIM_CIS8204_EPHYCON_INIT      0x0006
-#define MIIM_CIS8204_EPHYCON_RGMII     0x1000
+#define MIIM_CIS8204_EPHYCON_RGMII     0x1100
 
 /* Cicada 8204 Serial LED Control Register */
 #define MIIM_CIS8204_SLED_CON          0x1b