There're 2 versions of motherboards that could be used in ARC SDP.
The only important difference for U-Boot is different NAND IC in use:
[1] v2 board (we used to support up until now) sports MT29F4G08ABADAWP
while
[2] v3 board sports MT29F4G16ABADAWP
They are almost the same except data bus width 8-bit in [1] and 16-bit
in [2]. And for proper support of 16-bit data bus we have to pass
NAND_BUSWIDTH_16 option to NAND driver core - which we do now knowing
board type we're running on.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
#include <malloc.h>
#include <netdev.h>
#include <phy.h>
+#include "axs10x.h"
DECLARE_GLOBAL_DATA_PTR;
return 0;
}
+
+
+#define AXS_MB_CREG 0xE0011000
+
+int board_early_init_f(void)
+{
+ if (readl((void __iomem *)AXS_MB_CREG + 0x234) & (1 << 28))
+ gd->board_type = AXS_MB_V3;
+ else
+ gd->board_type = AXS_MB_V2;
+
+ return 0;
+}
--- /dev/null
+/*
+ * Copyright (C) 2015 Synopsys, Inc. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _BOARD_SYNOPSYS_AXS10X_H
+#define _BOARD_SYNOPSYS_AXS10X_H
+
+enum {
+ AXS_MB_V2,
+ AXS_MB_V3
+};
+
+#endif /* _BOARD_SYNOPSYS_AXS10X_H */
+
#include <malloc.h>
#include <nand.h>
#include <asm/io.h>
+#include "axs10x.h"
+
+DECLARE_GLOBAL_DATA_PTR;
#define BUS_WIDTH 8 /* AXI data bus width in bytes */
nand->write_buf = axs101_nand_write_buf;
nand->read_buf = axs101_nand_read_buf;
+ /* MBv3 has NAND IC with 16-bit data bus */
+ if (gd->board_type == AXS_MB_V3)
+ nand->options |= NAND_BUSWIDTH_16;
+
return 0;
}
#define CONFIG_SYS_BOOTM_LEN 0x2000000 /* 32 MB */
#define CONFIG_SYS_LOAD_ADDR 0x82000000
+/*
+ * This board might be of different versions so handle it
+ */
+#define CONFIG_BOARD_TYPES
+#define CONFIG_BOARD_EARLY_INIT_F
+
/*
* NAND Flash configuration
*/