It will take more than 1s when wake up from deep sleep. Most of the
time is spent on outputing information. This patch reduced the deep
sleep latency by:
1. avoid outputing system informaton
2. remove flush cache after DDR restore
3. skip reloading second stage uboot binary when SD boot
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
#include <asm/secure.h>
#endif
#include <asm/armv7.h>
-#include <asm/cache.h>
#if defined(CONFIG_LS102XA)
#include <asm/arch/immap_ls102xa.h>
for (i = 0; i < DDR_BUFF_LEN / 8; i++)
*dst++ = *src++;
-
- flush_dcache_all();
}
static void dp_resume_prepare(void)
dp_ddr_restore();
board_sleep_prepare();
armv7_init_nonsec();
- cleanup_before_linux();
#ifdef CONFIG_U_QE
u_qe_resume();
#endif
}
#if defined(CONFIG_DEEP_SLEEP)
- if (is_warm_boot())
- fsl_dp_disable_console();
+ if (is_warm_boot()) {
+ timer_init();
+ dram_init();
+ }
#endif
return 0;
#ifdef CONFIG_SPL_BUILD
void board_init_f(ulong dummy)
{
+ void (*second_uboot)(void);
+
/* Clear the BSS */
memset(__bss_start, 0, __bss_end - __bss_start);
enable_layerscape_ns_access();
#endif
+ /*
+ * if it is woken up from deep sleep, then jump to second
+ * stage uboot and continue executing without recopying
+ * it from SD since it has already been reserved in memeory
+ * in last boot.
+ */
+ if (is_warm_boot()) {
+ second_uboot = (void (*)(void))CONFIG_SYS_TEXT_BASE;
+ second_uboot();
+ }
+
board_init_r(NULL, 0);
}
#endif