i2c: sh_i2c.c: support I2C2, I2C3 and I2C4
authorTetsuyuki Kobayashi <koba@kmckk.co.jp>
Thu, 13 Sep 2012 19:07:59 +0000 (19:07 +0000)
committerHeiko Schocher <hs@denx.de>
Tue, 16 Oct 2012 03:47:20 +0000 (05:47 +0200)
sh_i2c.c support I2C0 and I2C1. This patch extends it to I2C4.

Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
drivers/i2c/sh_i2c.c
include/configs/kzm9g.h

index c667a1bdf06de6dc0b1173a7a57c5a091f2fe440..d50c8eca6d320f85fe172d23db07f2ba949f8622 100644 (file)
@@ -184,6 +184,21 @@ int i2c_set_bus_num(unsigned int bus)
        case 1:
                base = (void *)CONFIG_SH_I2C_BASE1;
                break;
+#ifdef CONFIG_SH_I2C_BASE2
+       case 2:
+               base = (void *)CONFIG_SH_I2C_BASE2;
+               break;
+#endif
+#ifdef CONFIG_SH_I2C_BASE3
+       case 3:
+               base = (void *)CONFIG_SH_I2C_BASE3;
+               break;
+#endif
+#ifdef CONFIG_SH_I2C_BASE4
+       case 4:
+               base = (void *)CONFIG_SH_I2C_BASE4;
+               break;
+#endif
        default:
                return -1;
        }
index 75b9257e1da90fb168d2a4b4edeaa901be08fed7..4898fb60f4b66e37f5c317b37d66df210cbdba8e 100644 (file)
 #define CONFIG_SH_I2C_8BIT
 #define CONFIG_HARD_I2C
 #define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_MAX_I2C_BUS  (2)
+#define CONFIG_SYS_MAX_I2C_BUS  (5)
 #define CONFIG_SYS_I2C_MODULE
 #define CONFIG_SYS_I2C_SPEED    (100000) /* 100 kHz */
 #define CONFIG_SYS_I2C_SLAVE    (0x7F)
 #define CONFIG_SH_I2C_CLOCK     (104000000) /* 104 MHz */
 #define CONFIG_SH_I2C_BASE0     (0xE6820000)
 #define CONFIG_SH_I2C_BASE1     (0xE6822000)
+#define CONFIG_SH_I2C_BASE2     (0xE6824000)
+#define CONFIG_SH_I2C_BASE3     (0xE6826000)
+#define CONFIG_SH_I2C_BASE4     (0xE6828000)
 
 #endif /* __KZM9G_H */