DDR3 support is tested and working with beaglebone hardware. Include a check
for this board type and configure DDR3. The timings and other configuration
match EVM SK.
Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Acked-by: Jason Kridner <jdk@ti.com>
return !strncmp(header.name, "A335BONE", HDR_NAME_LEN);
}
return !strncmp(header.name, "A335BONE", HDR_NAME_LEN);
}
+static inline int board_is_bone_lt(void)
+{
+ return !strncmp(header.name, "A335BNLT", HDR_NAME_LEN);
+}
+
static inline int board_is_evm_sk(void)
{
return !strncmp("A335X_SK", header.name, HDR_NAME_LEN);
static inline int board_is_evm_sk(void)
{
return !strncmp("A335X_SK", header.name, HDR_NAME_LEN);
static short inline board_memory_type(void)
{
/* The following boards are known to use DDR3. */
static short inline board_memory_type(void)
{
/* The following boards are known to use DDR3. */
+ if (board_is_evm_sk() || board_is_bone_lt())
return EMIF_REG_SDRAM_TYPE_DDR3;
return EMIF_REG_SDRAM_TYPE_DDR2;
return EMIF_REG_SDRAM_TYPE_DDR3;
return EMIF_REG_SDRAM_TYPE_DDR2;
+ if (board_is_bone() || board_is_bone_lt()) {
writel(MII_MODE_ENABLE, &cdev->miisel);
cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
PHY_INTERFACE_MODE_MII;
writel(MII_MODE_ENABLE, &cdev->miisel);
cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
PHY_INTERFACE_MODE_MII;