#define ADMHCD_INTMASK 0x00000001 /* Interrupt mask */
#define ADMHCD_REG_HOSTCONTROL 0x10
#define ADMHCD_DMA_EN 0x00000004 /* USB host DMA enable */
#define ADMHCD_INTMASK 0x00000001 /* Interrupt mask */
#define ADMHCD_REG_HOSTCONTROL 0x10
#define ADMHCD_DMA_EN 0x00000004 /* USB host DMA enable */
#define ADMHCD_STATE_RST 0x00000000 /* bus state reset */
#define ADMHCD_STATE_RES 0x00000001 /* bus state resume */
#define ADMHCD_STATE_OP 0x00000002 /* bus state operational */
#define ADMHCD_STATE_RST 0x00000000 /* bus state reset */
#define ADMHCD_STATE_RES 0x00000001 /* bus state resume */
#define ADMHCD_STATE_OP 0x00000002 /* bus state operational */