ddr: socfpga: Fix EMIF clear timeout
authorMarek Vasut <marex@denx.de>
Fri, 8 Mar 2019 18:11:55 +0000 (19:11 +0100)
committerMarek Vasut <marex@denx.de>
Sat, 9 Mar 2019 22:25:19 +0000 (23:25 +0100)
commitffd1e1a336730b6991c2ae7e7b0605e99d4f2b06
tree62d7fe736dcb1be814c3a94725bf558cfd92dbd9
parenta356fb60be5a853ab73e5b58c8bfcd8e3abc89ea
ddr: socfpga: Fix EMIF clear timeout

The current EMIF clear timeout handling code was applying bitwise
operations to signed data types and as it was, was extremely hard
to read. Replace it with simple wait_for_bit(). Expand the error
handling to make it more readable too.

This patch also changes the timeout for emif_clear() from 14 hours
to 1 second.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
drivers/ddr/altera/sdram_arria10.c