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(parent: c955289) | patch
ARM: uniphier: adjust DDR clock delay line for ProXstream2
authorMasahiro Yamada <yamada.masahiro@socionext.com>
Fri, 5 Feb 2016 04:21:07 +0000 (13:21 +0900)
committerMasahiro Yamada <yamada.masahiro@socionext.com>
Sun, 14 Feb 2016 08:07:46 +0000 (17:07 +0900)
commitf775c09d00cc355a87cf4ba935eff86eacd0c961
tree03b12c19637a6bbc0f808e77a3806402db3f24b9tree | snapshot
parentc9552895a8055fed424d6817008fccd37dbfd01ccommit | diff
ARM: uniphier: adjust DDR clock delay line for ProXstream2

It turned out that DDR channel 2 was not working on ProXstream2
Vodka board.  Add the missing ACBLDR0 register setting to adjust
the delay between the clock lines and the address/command lines.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
arch/arm/mach-uniphier/dram/umc-proxstream2.c diff | blob | history
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