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(parent: ddb5c5b) | patch
blackfin: run core1 from L1 code sram start address in uboot init code on core 0
authorSonic Zhang <sonic.zhang@analog.com>
Tue, 5 Feb 2013 10:57:49 +0000 (18:57 +0800)
committerSonic Zhang <sonic.zhang@analog.com>
Mon, 13 May 2013 07:47:24 +0000 (15:47 +0800)
commitf4d8038439fb372c91c3a27121a911c359603bcf
treec9a576f2f81d7ad65d8222f20f5c4a1fc4fa0e24tree | snapshot
parentddb5c5be1eddd38a47dc197cfacdbf149930740dcommit | diff
blackfin: run core1 from L1 code sram start address in uboot init code on core 0

Define core 1 L1 code sram start address.
Add function to enable core 1 for BF609 and BF561.
Add config macro to allow customer to run core 1 in uboot init code on core 0.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
arch/blackfin/cpu/cpu.c diff | blob | history
arch/blackfin/include/asm/mach-bf561/BF561_def.h diff | blob | history
arch/blackfin/include/asm/mach-bf609/BF609_def.h diff | blob | history
include/configs/bf561-ezkit.h diff | blob | history
include/configs/bf609-ezkit.h diff | blob | history
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