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(parent: 2e2a003) | patch
x86: Add support for newer CAR schemes
authorSimon Glass <sjg@chromium.org>
Sat, 7 Dec 2019 04:42:25 +0000 (21:42 -0700)
committerBin Meng <bmeng.cn@gmail.com>
Sun, 15 Dec 2019 03:44:18 +0000 (11:44 +0800)
commitf45e747d6d0b107992e8aed74c001034c8a6f1a1
tree8f39a274ed8a75083893cf1899d64f242ab11059tree | snapshot
parent2e2a0035d4ab520615fd13dc7c89a60a44eb6bc0commit | diff
x86: Add support for newer CAR schemes

Newer Intel SoCs have different ways of setting up cache-as-ram (CAR).
Add support for these along with suitable configuration options.

To make the code cleaner, adjust a few definitions in processor.h so that
they can be used from assembler.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
arch/x86/Kconfig diff | blob | history
arch/x86/cpu/intel_common/Makefile diff | blob | history
arch/x86/cpu/intel_common/car2.S [new file with mode: 0644] blob
arch/x86/cpu/intel_common/car2_uninit.S [new file with mode: 0644] blob
arch/x86/include/asm/processor.h diff | blob | history
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