sunxi: video: HDMI: Fix LCD clock divider
authorMark Kettenis <kettenis@openbsd.org>
Fri, 9 Aug 2019 20:30:26 +0000 (22:30 +0200)
committerAnatolij Gustschin <agust@denx.de>
Sat, 21 Sep 2019 08:52:57 +0000 (10:52 +0200)
commitf34e7fc29b32066a8af6c4d22a1f6e0fbfd8e6db
tree9dffe4a70be8518456b17c2bf8d0112486cecb76
parentd2a8271c88514f30c2fe00d2584401348f39c3d4
sunxi: video: HDMI: Fix LCD clock divider

Currently we may end up with an LCD clock divider that differs from
the HDMI PHY clock divider if we can't exactly match the pixel clock.
Fix this by using DIV_ROUND_UP to calculate the divider.  This works
since the PLL is chosen such that the resulting pixel clock is
never higher than the requested pixel clock.

Fixes: 1feed358ed15 ("sunxi: video: HDMI: Fix clock setup")

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
drivers/video/sunxi/sunxi_dw_hdmi.c