riscv: implement IPI platform functions using SBI
authorLukas Auer <lukas.auer@aisec.fraunhofer.de>
Sun, 17 Mar 2019 18:28:34 +0000 (19:28 +0100)
committerAndes <uboot@andestech.com>
Mon, 8 Apr 2019 01:44:26 +0000 (09:44 +0800)
commitf152febb2a97696f7c7e6df46bf585cfc962a835
tree50daf485b2c0e168be7b1b59cb150f58b40b89d1
parent34a0626fc344f51cd768efecdd52628b677fb9a8
riscv: implement IPI platform functions using SBI

The supervisor binary interface (SBI) provides the necessary functions
to implement the platform IPI functions riscv_send_ipi() and
riscv_clear_ipi(). Use it to implement them.

This adds support for inter-processor interrupts (IPIs) on RISC-V CPUs
running in supervisor mode. Support for machine mode is already
available for CPUs that include the SiFive CLINT.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
arch/riscv/Kconfig
arch/riscv/lib/Makefile
arch/riscv/lib/sbi_ipi.c [new file with mode: 0644]