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(parent: 6609916) | patch
powerpc/c29xpcie: 8k page size NAND boot support base on TPL/SPL
authorPo Liu <po.liu@freescale.com>
Fri, 10 Jan 2014 02:10:59 +0000 (10:10 +0800)
committerYork Sun <yorksun@freescale.com>
Tue, 21 Jan 2014 21:42:40 +0000 (13:42 -0800)
commiteb6b458cef28c86603d56a27b9ee699b13c60c14
treeae4973790cc7d439f19255db39a5156c91120b22tree | snapshot
parent6609916efb74724e53db368dd48bfb290d4d9f4ccommit | diff
powerpc/c29xpcie: 8k page size NAND boot support base on TPL/SPL

Using the TPL/SPL method to booting from 8k page NAND flash.
- Add 256kB size SRAM tlb for second step booting;
- Add spl.c for TPL image boot;
- Add spl_minimal.c for minimal SPL image;
- Add C29XPCIE_NAND configure;
- Modify C29XPCIE.h for nand config and enviroment;

Signed-off-by: Po Liu <Po.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
board/freescale/c29xpcie/Makefile diff | blob | history
board/freescale/c29xpcie/cpld.c diff | blob | history
board/freescale/c29xpcie/spl.c [new file with mode: 0644] blob
board/freescale/c29xpcie/spl_minimal.c [new file with mode: 0644] blob
board/freescale/c29xpcie/tlb.c diff | blob | history
boards.cfg diff | blob | history
include/configs/C29XPCIE.h diff | blob | history
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