powerpc/mpc85xx: software workaround for DDR erratum A-004468
authorYork Sun <yorksun@freescale.com>
Mon, 8 Oct 2012 07:44:25 +0000 (07:44 +0000)
committerAndy Fleming <afleming@freescale.com>
Mon, 22 Oct 2012 19:31:28 +0000 (14:31 -0500)
commiteb5394120643922626f18e5fe7b0b3dc0ed43b9a
tree968121a3577cf3c8e14bd435d9c8c303140f3cd1
parentf31cfd19253713eea59311dec9e99df5d43b2db9
powerpc/mpc85xx: software workaround for DDR erratum A-004468

Boot space translation utilizes the pre-translation address to select
the DDR controller target. However, the post-translation address will be
presented to the selected DDR controller. It is possible that the pre-
translation address selects one DDR controller but the post-translation
address exists in a different DDR controller when using certain DDR
controller interleaving modes. The device may fail to boot under these
circumstances. Note that a DDR MSE error will not be detected since DDR
controller bounds registers are programmed to be the same when configured
for DDR controller interleaving.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
arch/powerpc/cpu/mpc85xx/cmd_errata.c
arch/powerpc/cpu/mpc85xx/fdt.c
arch/powerpc/cpu/mpc85xx/mp.c
arch/powerpc/cpu/mpc86xx/fdt.c
arch/powerpc/cpu/mpc86xx/mp.c
arch/powerpc/cpu/mpc8xxx/ddr/util.c
arch/powerpc/include/asm/config_mpc85xx.h
arch/powerpc/include/asm/mp.h
arch/powerpc/lib/board.c