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powerpc: mpc83xx: Minimize r1 modification
authormario.six@gdsys.cc <mario.six@gdsys.cc>
Tue, 17 Jan 2017 07:33:47 +0000 (08:33 +0100)
committerYork Sun <york.sun@nxp.com>
Tue, 31 Jan 2017 17:35:06 +0000 (09:35 -0800)
commite80311a5f09967b2c33a772c26983abfbc821140
tree31f9b38ead0b52626eacc8e806db76c10686f16atree | snapshot
parentcf4128e53caa4f7b0a6586fc3f10690d5c05db31commit | diff
powerpc: mpc83xx: Minimize r1 modification

The r1 register is modified several times during the cache-ram setup of
the MPC83xx SoCs.

Since this SP modification confuses debuggers, we use a general purpose
register to compute the new stack pointer value, and only set the SP
once after all computations are done.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/powerpc/cpu/mpc83xx/start.S diff | blob | history
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