riscv: qemu: add SPL configuration
authorLukas Auer <lukas.auer@aisec.fraunhofer.de>
Wed, 21 Aug 2019 19:14:49 +0000 (21:14 +0200)
committerAndes <uboot@andestech.com>
Mon, 26 Aug 2019 08:07:42 +0000 (16:07 +0800)
commite456a81935aafcecc8e53a7cd35efe9267781041
tree2c9bdd38f2a56acfce3580257fecaf8a692651ca
parent109f82bea906478807d831978dc680d3ef992f17
riscv: qemu: add SPL configuration

Add two new configurations (qemu-riscv{32,64}_spl_defconfig) with SPL
enabled for RISC-V QEMU. QEMU does not require SPL to run U-Boot. The
configurations are meant to help the development of SPL on RISC-V.

The configurations enable RAM as the only SPL boot device. Images must
be loaded at address 0x80200000. In the default boot flow, U-Boot SPL
starts in machine mode, loads the OpenSBI FW_DYNAMIC firmware and U-Boot
proper from the supplied FIT image, and starts OpenSBI. U-Boot proper is
then started in supervisor mode by OpenSBI.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
board/emulation/qemu-riscv/Kconfig
board/emulation/qemu-riscv/MAINTAINERS
board/emulation/qemu-riscv/qemu-riscv.c
configs/qemu-riscv32_spl_defconfig [new file with mode: 0644]
configs/qemu-riscv64_spl_defconfig [new file with mode: 0644]
include/configs/qemu-riscv.h