Do not use REF clock divider higher than 2 on QCA95xx/AR934x
authorPiotr Dymacz <pepe2k@gmail.com>
Sat, 19 Nov 2016 15:51:15 +0000 (16:51 +0100)
committerPiotr Dymacz <pepe2k@gmail.com>
Sat, 19 Nov 2016 15:51:15 +0000 (16:51 +0100)
commite43c77796c55d633eb359a69a6d2708a99df11c7
tree957786871c9225b4bde2c7e77eb44329b20f320e
parent91e9291ae270ddae2bcfc9c5ad8810036220002f
Do not use REF clock divider higher than 2 on QCA95xx/AR934x

As tests showed, REF clock divider is not reliable with
values higher than 2. Final clock frequency is stable
between restarts, but its value is in range +/- 20-25%
in comparison to expected/calculated frequency.

Instead of using higher REF clock divider values, make
use of fractional part of the multiplier.

This fixes #128
u-boot/include/cmd_qcaclk.h
u-boot/include/soc/qca95xx_pll_init.h