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[MIPS] Cleanup CP0 Status initialization
authorShinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Tue, 25 Mar 2008 12:30:07 +0000 (21:30 +0900)
committerShinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Tue, 25 Mar 2008 12:30:07 +0000 (21:30 +0900)
commitdecaba6f5cf386d569ac3997bebb871b966c6b18
tree71f09ba3ea48d9ae4a00d7e6735f71980e7fa2f5tree | snapshot
parentd43d43ef2845af309c25a64bb9c2c5fb3261bc23commit | diff
[MIPS] Cleanup CP0 Status initialization

Add setup_c0_status from Linux. For the moment we disable interrupts, set
CU0, mark the kernel mode, and clear ERL and EXL. This is good enough for
reset-time configuration and will work well across most processors.

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
cpu/mips/start.S diff | blob | history
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