author | Chin Liang See <clsee@altera.com> | |
Wed, 5 Mar 2014 04:13:53 +0000 (22:13 -0600) | ||
committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | |
Mon, 7 Apr 2014 08:41:50 +0000 (10:41 +0200) | ||
commit | ddfeb0aaf49e30afff04e7a619913f09c2d4ce45 | |
tree | 08d2d83879c3e5d748ce08bfe9ddac64f193cac7 | tree | snapshot |
parent | 1a9df13d5bc0b68c9dcae88d244c995c9351db67 | commit | diff |
arch/arm/cpu/armv7/socfpga/Makefile | diff | blob | history | |
arch/arm/cpu/armv7/socfpga/clock_manager.c | [new file with mode: 0644] | blob |
arch/arm/cpu/armv7/socfpga/spl.c | diff | blob | history | |
arch/arm/include/asm/arch-socfpga/clock_manager.h | [new file with mode: 0644] | blob |
arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h | diff | blob | history | |
board/altera/socfpga/pll_config.h | [new file with mode: 0644] | blob |
include/configs/socfpga_cyclone5.h | diff | blob | history |