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armv8/fsl-lsch3: Fix TCR_EL3 for the final MMU setup.
authorZhichun Hua <zhichun.hua@freescale.com>
Mon, 29 Jun 2015 07:50:42 +0000 (15:50 +0800)
committerYork Sun <yorksun@freescale.com>
Mon, 20 Jul 2015 18:44:40 +0000 (11:44 -0700)
commitdb14f11dfe348550d8c10c6609277488d9f500d6
tree22d4e2a1e32e8f9d626a65173b994b49de54bb07tree | snapshot
parent21a257b9b3b29ddb1445fdafe12e05727080a198commit | diff
armv8/fsl-lsch3: Fix TCR_EL3 for the final MMU setup.

When final MMU table is setup in DDR, TCR attributes must match
those of the memroy for cacheability and shareability.

Signed-off-by: Zhichun Hua <zhichun.hua@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
arch/arm/cpu/armv8/fsl-lsch3/cpu.c diff | blob | history
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