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(parent: 5684842) | patch
armv8/lsch3/config: Define CONFIG_SYS_CACHELINE_SIZE for LS2085A
authorNikhil Badola <nikhil.badola@freescale.com>
Fri, 26 Jun 2015 11:29:21 +0000 (16:59 +0530)
committerYork Sun <yorksun@freescale.com>
Mon, 3 Aug 2015 19:06:38 +0000 (12:06 -0700)
commitca7fb12cc18e80d14cca9570aec1d544f5d8c169
tree931afc9c2b8d3d0ced54f34ff4d4831b8e46c117tree | snapshot
parent56848428a88f89420ae7acc04bb5805e70c430a3commit | diff
armv8/lsch3/config: Define CONFIG_SYS_CACHELINE_SIZE for LS2085A

Define CONFIG_SYS_CACHELINE_SIZE for LS2085A which is required by
USB XHCI stack for alignment

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
arch/arm/include/asm/arch-fsl-lsch3/config.h diff | blob | history
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