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(parent: 52d00a8) | patch
esdhc: Add CONFIG_SYS_FSL_ESDHC_LE and CONFIG_SYS_FSL_ESDHC_BE macros
authorWang Huan <b18965@freescale.com>
Fri, 5 Sep 2014 05:52:39 +0000 (13:52 +0800)
committerYork Sun <yorksun@freescale.com>
Mon, 8 Sep 2014 17:30:33 +0000 (10:30 -0700)
commitc82e9de400ee36038c76be67c5a6fb39c165ac1c
tree7da71ffa7005b4a59dd53aeb27e7df17be952c51tree | snapshot
parent52d00a812a29974e660f64a8839ddb550dca5290commit | diff
esdhc: Add CONFIG_SYS_FSL_ESDHC_LE and CONFIG_SYS_FSL_ESDHC_BE macros

For LS102xA, the processor is in little-endian mode, while esdhc IP is
in big-endian mode. CONFIG_SYS_FSL_ESDHC_LE and CONFIG_SYS_FSL_ESDHC_BE
are added. So accessing ESDHC registers can be determined by ESDHC IP's
endian mode.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
doc/README.fsl-esdhc [new file with mode: 0644] blob
include/fsl_esdhc.h diff | blob | history
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