ARM: socfpga: Disable bridges in SPL unless booting from FPGA
authorMarek Vasut <marex@denx.de>
Tue, 16 Apr 2019 12:19:34 +0000 (14:19 +0200)
committerMarek Vasut <marex@denx.de>
Mon, 29 Apr 2019 08:08:55 +0000 (10:08 +0200)
commitc1d4b464c8b8826b1d8a6d84ee5202f71ce933d1
tree5b522270674ff21cca254a209348725c36a2c6fc
parent8df653c32545171ecede4b740e38e8a4af4ed9eb
ARM: socfpga: Disable bridges in SPL unless booting from FPGA

Disable bridges between L3 Main switch and FPGA unless booting
from FPGA and keep them disabled to prevent glitches and possible
hangs of the L3 Main switch.

The current version of the code could have enabled the bridges
between the L3 Main switch and FPGA for a short period of time
in board_init_f() in case the FPGA was programmed and then again
disable them at the end of board_init_f(). Replace this with a
code which only sets up the handoff registers and let the user
enable the bridges later on.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
arch/arm/mach-socfpga/spl_gen5.c