powerpc/mpc85xx: Add SCFG_PIXCLKCR register support for T1040
authorPriyanka Jain <Priyanka.Jain@freescale.com>
Thu, 30 Jan 2014 10:09:58 +0000 (15:39 +0530)
committerYork Sun <yorksun@freescale.com>
Fri, 7 Mar 2014 22:53:29 +0000 (14:53 -0800)
commitbf4699db852f88b0a30b9d7e8b1bea83d01c0d92
tree37f0fc6ca9fd11986e690cfe9f3bc4a1eb1441af
parent8d67c3685e3b4bea8524e2e25b1443b62a69352b
powerpc/mpc85xx: Add SCFG_PIXCLKCR register support for T1040

T1040 SoC has SCFG (Supplement Configuration) Block which provides
chip specific configuration and status support. The base address of
SCFG block in T1040 is 0xfc000.
SCFG contains SCFG_PIXCLKCR (DIU pixel clock control register)
at offset 0x28.

Add definition of
-SCFG block
-SCFG_PIXCLKCR register
-Bits definition of SCFG_PIXCLK register

Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
arch/powerpc/include/asm/immap_85xx.h