sunxi: clk: add MMC gates/resets
authorAndre Przywara <andre.przywara@arm.com>
Tue, 29 Jan 2019 15:54:09 +0000 (15:54 +0000)
committerJagan Teki <jagan@amarulasolutions.com>
Tue, 29 Jan 2019 18:00:11 +0000 (23:30 +0530)
commitbb3e5aa2896d69a6fe86861004d7d4e33824efbe
tree8f38de7357c03681bc0309bd76ab52fe00e02e06
parent1659156c74fb575d851fc1f43818d232712e776b
sunxi: clk: add MMC gates/resets

Add the MMC clock gates and reset bits for all the Allwinner SoCs.
This allows them to be used by the MMC driver.

We don't advertise the mod clock yet, as this is still handled by the
MMC driver.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
[jagan: add V3S, A80 gates/resets]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
drivers/clk/sunxi/clk_a10.c
drivers/clk/sunxi/clk_a10s.c
drivers/clk/sunxi/clk_a23.c
drivers/clk/sunxi/clk_a31.c
drivers/clk/sunxi/clk_a64.c
drivers/clk/sunxi/clk_a80.c
drivers/clk/sunxi/clk_a83t.c
drivers/clk/sunxi/clk_h3.c
drivers/clk/sunxi/clk_h6.c
drivers/clk/sunxi/clk_r40.c
drivers/clk/sunxi/clk_v3s.c