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MIPS: cache: optimise changing of k0 CCA mode
authorDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Fri, 7 Sep 2018 17:02:04 +0000 (19:02 +0200)
committerDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
Sat, 22 Sep 2018 19:02:03 +0000 (21:02 +0200)
commitb838586086af3278bcaead3720c7a18813cf4619
tree879cf10b808b1cc2f4aa708d44cbba717089ad6ctree | snapshot
parent2f85c2be21dfee1e8ac1f8fb9759be7108233e85commit | diff
MIPS: cache: optimise changing of k0 CCA mode

Changing the Cache Coherency Algorithm (CCA) for kernel mode
requires executing from KSEG1. Thus do a jump from KSEG0 to KSEG1
before changing the CCA mode. Jump back to KSEG0 afterwards.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
arch/mips/lib/cache_init.S diff | blob | history
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