Revert "mmc: fsl_esdhc: fix sd/mmc ddr mode clock setting issue"
authorLukasz Majewski <lukma@denx.de>
Tue, 7 May 2019 15:47:28 +0000 (17:47 +0200)
committerPeng Fan <peng.fan@nxp.com>
Mon, 20 May 2019 03:34:27 +0000 (11:34 +0800)
commitb6a0427554424a9d6bb563cae4f5555487f38caf
treef4c6d202d0097a6adc6529b00f478490d58e5d7d
parente14d9ca4919e5bc987fc628135104f2b2c91af90
Revert "mmc: fsl_esdhc: fix sd/mmc ddr mode clock setting issue"

This reverts commit 72a89e0da5ac6a4ab929b15a2b656f04f50767f6, which
causes the imx53 HSC to hang as the eMMC is not working properly anymore.

The exact error message:
MMC write: dev # 0, block # 2, count 927 ... mmc write failed
0 blocks written: ERROR

imx53 is not using the DDR mode.

Debugging of pre_div and div generation showed that those values are
generated in a way, which is not matching the ones from working setup.

As the original patch was performing code refactoring, let's revert this
change, so all imx53 boards would work again.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
drivers/mmc/fsl_esdhc.c