arm: provide a PCS-compliant setjmp implementation
authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tue, 10 Oct 2017 14:21:13 +0000 (16:21 +0200)
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tue, 21 Nov 2017 22:57:22 +0000 (23:57 +0100)
commitb4806d6f1f82f0a2d76b7206bdc5e4ba7d567b6f
tree603302f37d76a3e3a20ebfa01bfba45e6273caaf
parentff143d55564373c2a5e8a128a71223f26ee2420f
arm: provide a PCS-compliant setjmp implementation

The previous setjmp-implementation (as a static inline function that
contained an 'asm volatile' sequence) was extremely fragile: (some
versions of) GCC optimised the set of registers.  One critical example
was the removal of 'r9' from the clobber list, if -ffixed-reg9 was
supplied.

To increase robustness and ensure PCS-compliant behaviour, the setjmp
and longjmp implementation are now in assembly and closely match what
one would expect to find in a libc implementation.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
arch/arm/include/asm/setjmp.h
arch/arm/lib/Makefile
arch/arm/lib/setjmp.S [new file with mode: 0644]
arch/arm/lib/setjmp_aarch64.S [new file with mode: 0644]