imx: spl: Fix NAND bootmode detection
authorEran Matityahu <eran.m@variscite.com>
Thu, 14 Dec 2017 18:20:02 +0000 (20:20 +0200)
committerStefano Babic <sbabic@denx.de>
Wed, 3 Jan 2018 13:01:38 +0000 (14:01 +0100)
commitaf104ae5b87c8efb107ac282d09927d8346dc94f
treedb68d12e56ed3dc249d179941149d5ad9f76c8a1
parentbaefb63a13d106458577704ca4586b3f414c9520
imx: spl: Fix NAND bootmode detection

commit 20f14714169 ("imx: spl: Update NAND bootmode detection bit")
broke the NAND bootmode detection by checking if
BOOT_CFG1[7:4] == 0x8 for NAND boot mode.
This commit essentially reverts it, while using the IMX6_BMODE_*
macros that were introduced since.

Tables 8-7 & 8-10 from IMX6DQRM say the NAND boot mode selection
is done when BOOT_CFG1[7] is 1, but BOOT_CFG1[6:4] is not
necessarily 0x0 in this case.
Actually, NAND boot mode is when 0x8 <= BOOT_CFG1[7:4] <= 0xf,
like it was in the code before.

Signed-off-by: Eran Matityahu <eran.m@variscite.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Tim Harvey <tharvey@gateworks.com>
arch/arm/include/asm/mach-imx/sys_proto.h
arch/arm/mach-imx/spl.c
board/engicam/common/board.c