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(parent: 63faf25) | patch
x86: crownbay: Add SPI flash support
authorBin Meng <bmeng.cn@gmail.com>
Wed, 17 Dec 2014 07:50:44 +0000 (15:50 +0800)
committerSimon Glass <sjg@chromium.org>
Fri, 19 Dec 2014 00:26:07 +0000 (17:26 -0700)
commitadfe3b247a7a281931f0fd865e9d00600e9dd384
treee2a388dc0df283233d937f35433ab416b3d48307tree | snapshot
parent63faf2507d263bbd6285b3fe637fd80df05a58a0commit | diff
x86: crownbay: Add SPI flash support

The Crown Bay board has an SST25VF016B flash connected to the Tunnel
Creek processor SPI controller used as the BIOS media where U-Boot
is stored. Enable this flash support.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
arch/x86/cpu/queensbay/tnc.c diff | blob | history
arch/x86/include/asm/arch-queensbay/tnc.h [new file with mode: 0644] blob
include/configs/crownbay.h diff | blob | history
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