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(parent: 2dd9dc0) | patch
Fixup bug in PMIC TPS65217 register address definition
authorBrock Zheng Techyauld Ltd <yzheng@techyauld.com>
Tue, 6 Jun 2017 01:06:21 +0000 (09:06 +0800)
committerJaehoon Chung <jh80.chung@samsung.com>
Fri, 9 Jun 2017 11:25:16 +0000 (20:25 +0900)
commitabf54bf978ed9932d69ee7f937012398d0d8d08f
treeabaefb891099fae50bd9f59893e9bc713044d9fetree | snapshot
parent2dd9dc02a3fa1f8c244482e180415d19a5ead929commit | diff
Fixup bug in PMIC TPS65217 register address definition

The addresses of the registers in TI TPS65217 are not continuous.
     There is a gap between ENABLE(0x16) and DEFUVLO(0x18). No 0x17
     register available.

     Fixup the enum values by adding a 'reserved' placeholder to correct
     the addresses higher than 0x17.

     Series-to: Heiko Schocher <hs@denx.de>

Signed-off-by: Brock Zheng Techyauld Ltd <yzheng@techyauld.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
include/power/tps65217.h diff | blob | history
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